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AMDGPU: MC support for v_cvt_scalef32_pk_{bf|f}16_{bf|fp}8 of gfx950. #117593

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Merged
merged 1 commit into from
Nov 26, 2024
Merged

AMDGPU: MC support for v_cvt_scalef32_pk_{bf|f}16_{bf|fp}8 of gfx950. #117593

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8 changes: 8 additions & 0 deletions llvm/lib/Target/AMDGPU/VOP3Instructions.td
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Original file line number Diff line number Diff line change
Expand Up @@ -945,6 +945,8 @@ let SubtargetPredicate = HasFP8ConversionScaleInsts, mayRaiseFPException = 0 in
defm V_CVT_SCALEF32_PK_F32_FP8 : VOP3Inst<"v_cvt_scalef32_pk_f32_fp8", VOP3_CVT_SCALE_PK_F16BF16F32_FP4FP8BF8_Profile<v2f32>>;
defm V_CVT_SCALEF32_PK_FP8_F16 : VOP3Inst<"v_cvt_scalef32_pk_fp8_f16", VOP3_CVT_SCALE_PK_FP8BF8_F16BF16_Profile>;
defm V_CVT_SCALEF32_PK_FP8_BF16 : VOP3Inst<"v_cvt_scalef32_pk_fp8_bf16", VOP3_CVT_SCALE_PK_FP8BF8_F16BF16_Profile>;
defm V_CVT_SCALEF32_PK_F16_FP8 : VOP3Inst<"v_cvt_scalef32_pk_f16_fp8", VOP3_CVT_SCALE_PK_F16BF16F32_FP4FP8BF8_Profile<v2f16>>;
defm V_CVT_SCALEF32_PK_BF16_FP8 : VOP3Inst<"v_cvt_scalef32_pk_bf16_fp8", VOP3_CVT_SCALE_PK_F16BF16F32_FP4FP8BF8_Profile<v2f16>>;
}

let SubtargetPredicate = HasBF8ConversionScaleInsts, mayRaiseFPException = 0 in {
Expand All @@ -954,6 +956,8 @@ let SubtargetPredicate = HasBF8ConversionScaleInsts, mayRaiseFPException = 0 in
defm V_CVT_SCALEF32_PK_F32_BF8 : VOP3Inst<"v_cvt_scalef32_pk_f32_bf8", VOP3_CVT_SCALE_PK_F16BF16F32_FP4FP8BF8_Profile<v2f32>>;
defm V_CVT_SCALEF32_PK_BF8_F16 : VOP3Inst<"v_cvt_scalef32_pk_bf8_f16", VOP3_CVT_SCALE_PK_FP8BF8_F16BF16_Profile>;
defm V_CVT_SCALEF32_PK_BF8_BF16 : VOP3Inst<"v_cvt_scalef32_pk_bf8_bf16", VOP3_CVT_SCALE_PK_FP8BF8_F16BF16_Profile>;
defm V_CVT_SCALEF32_PK_F16_BF8 : VOP3Inst<"v_cvt_scalef32_pk_f16_bf8", VOP3_CVT_SCALE_PK_F16BF16F32_FP4FP8BF8_Profile<v2bf16>>;
defm V_CVT_SCALEF32_PK_BF16_BF8 : VOP3Inst<"v_cvt_scalef32_pk_bf16_bf8", VOP3_CVT_SCALE_PK_F16BF16F32_FP4FP8BF8_Profile<v2bf16>>;
}

let SubtargetPredicate = HasFP4ConversionScaleInsts, mayRaiseFPException = 0 in {
Expand Down Expand Up @@ -1908,6 +1912,8 @@ defm V_CVT_SCALEF32_PK_FP8_F32 : VOP3OpSel_Real_gfx9 <0x235>;
defm V_CVT_SCALEF32_PK_F32_FP8 : VOP3OpSel_Real_gfx9 <0x239>;
defm V_CVT_SCALEF32_PK_FP8_F16 : VOP3OpSel_Real_gfx9 <0x240>;
defm V_CVT_SCALEF32_PK_FP8_BF16: VOP3OpSel_Real_gfx9 <0x244>;
defm V_CVT_SCALEF32_PK_F16_FP8 : VOP3OpSel_Real_gfx9<0x248>;
defm V_CVT_SCALEF32_PK_BF16_FP8 : VOP3OpSel_Real_gfx9<0x269>;
}
let OtherPredicates = [HasBF8ConversionScaleInsts] in {
defm V_CVT_SCALEF32_F16_BF8 : VOP3OpSel_Real_gfx9 <0x24b>;
Expand All @@ -1916,6 +1922,8 @@ defm V_CVT_SCALEF32_PK_BF8_F32 : VOP3OpSel_Real_gfx9 <0x236>;
defm V_CVT_SCALEF32_PK_F32_BF8 : VOP3OpSel_Real_gfx9 <0x23a>;
defm V_CVT_SCALEF32_PK_BF8_F16 : VOP3OpSel_Real_gfx9 <0x241>;
defm V_CVT_SCALEF32_PK_BF8_BF16: VOP3OpSel_Real_gfx9 <0x245>;
defm V_CVT_SCALEF32_PK_F16_BF8 : VOP3OpSel_Real_gfx9<0x249>;
defm V_CVT_SCALEF32_PK_BF16_BF8 : VOP3OpSel_Real_gfx9<0x26a>;
}
let OtherPredicates = [HasFP4ConversionScaleInsts] in {
defm V_CVT_SCALEF32_PK_F32_FP4 : VOP3OpSel_Real_gfx9 <0x23f>;
Expand Down
96 changes: 96 additions & 0 deletions llvm/test/MC/AMDGPU/gfx950_asm_features.s
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Original file line number Diff line number Diff line change
Expand Up @@ -929,3 +929,99 @@ v_cvt_scalef32_pk32_fp6_bf16 v[20:25], v[10:25], v8
// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk32_fp6_f16 v[20:25], v[10:25], v8 ; encoding: [0x14,0x00,0x58,0xd2,0x0a,0x11,0x02,0x00]
v_cvt_scalef32_pk32_fp6_f16 v[20:25], v[10:25], v8

// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk_f16_fp8 v1, v2, v3 ; encoding: [0x01,0x00,0x48,0xd2,0x02,0x07,0x02,0x00]
v_cvt_scalef32_pk_f16_fp8 v1, v2, v3

// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk_f16_fp8 v1, v2, s3 ; encoding: [0x01,0x00,0x48,0xd2,0x02,0x07,0x00,0x00]
v_cvt_scalef32_pk_f16_fp8 v1, v2, s3

// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk_f16_fp8 v1, s2, 3 ; encoding: [0x01,0x00,0x48,0xd2,0x02,0x06,0x01,0x00]
v_cvt_scalef32_pk_f16_fp8 v1, s2, 3

// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk_f16_fp8 v1, v2, v3 op_sel:[1,0,0] ; encoding: [0x01,0x08,0x48,0xd2,0x02,0x07,0x02,0x00]
v_cvt_scalef32_pk_f16_fp8 v1, v2, v3 op_sel:[1,0,0]

// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk_f16_fp8 v1, v2, s3 op_sel:[1,0,0] ; encoding: [0x01,0x08,0x48,0xd2,0x02,0x07,0x00,0x00]
v_cvt_scalef32_pk_f16_fp8 v1, v2, s3 op_sel:[1,0,0]

// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk_f16_fp8 v1, s2, 3 op_sel:[1,0,0] ; encoding: [0x01,0x08,0x48,0xd2,0x02,0x06,0x01,0x00]
v_cvt_scalef32_pk_f16_fp8 v1, s2, 3 op_sel:[1,0,0]

// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk_f16_bf8 v1, v2, v3 ; encoding: [0x01,0x00,0x49,0xd2,0x02,0x07,0x02,0x00]
v_cvt_scalef32_pk_f16_bf8 v1, v2, v3

// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk_f16_bf8 v1, v2, s3 ; encoding: [0x01,0x00,0x49,0xd2,0x02,0x07,0x00,0x00]
v_cvt_scalef32_pk_f16_bf8 v1, v2, s3

// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk_f16_bf8 v1, s2, 3 ; encoding: [0x01,0x00,0x49,0xd2,0x02,0x06,0x01,0x00]
v_cvt_scalef32_pk_f16_bf8 v1, s2, 3

// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk_f16_bf8 v1, v2, v3 op_sel:[1,0,0] ; encoding: [0x01,0x08,0x49,0xd2,0x02,0x07,0x02,0x00]
v_cvt_scalef32_pk_f16_bf8 v1, v2, v3 op_sel:[1,0,0]

// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk_f16_bf8 v1, v2, s3 op_sel:[1,0,0] ; encoding: [0x01,0x08,0x49,0xd2,0x02,0x07,0x00,0x00]
v_cvt_scalef32_pk_f16_bf8 v1, v2, s3 op_sel:[1,0,0]

// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk_f16_bf8 v1, s2, 3 op_sel:[1,0,0] ; encoding: [0x01,0x08,0x49,0xd2,0x02,0x06,0x01,0x00]
v_cvt_scalef32_pk_f16_bf8 v1, s2, 3 op_sel:[1,0,0]

// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk_bf16_fp8 v1, v2, v3 ; encoding: [0x01,0x00,0x69,0xd2,0x02,0x07,0x02,0x00]
v_cvt_scalef32_pk_bf16_fp8 v1, v2, v3

// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk_bf16_fp8 v1, v2, s3 ; encoding: [0x01,0x00,0x69,0xd2,0x02,0x07,0x00,0x00]
v_cvt_scalef32_pk_bf16_fp8 v1, v2, s3

// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk_bf16_fp8 v1, s2, 3 ; encoding: [0x01,0x00,0x69,0xd2,0x02,0x06,0x01,0x00]
v_cvt_scalef32_pk_bf16_fp8 v1, s2, 3

// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk_bf16_fp8 v1, v2, v3 op_sel:[1,0,0] ; encoding: [0x01,0x08,0x69,0xd2,0x02,0x07,0x02,0x00]
v_cvt_scalef32_pk_bf16_fp8 v1, v2, v3 op_sel:[1,0,0]

// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk_bf16_fp8 v1, v2, s3 op_sel:[1,0,0] ; encoding: [0x01,0x08,0x69,0xd2,0x02,0x07,0x00,0x00]
v_cvt_scalef32_pk_bf16_fp8 v1, v2, s3 op_sel:[1,0,0]

// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk_bf16_fp8 v1, s2, 3 op_sel:[1,0,0] ; encoding: [0x01,0x08,0x69,0xd2,0x02,0x06,0x01,0x00]
v_cvt_scalef32_pk_bf16_fp8 v1, s2, 3 op_sel:[1,0,0]

// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk_bf16_bf8 v1, v2, v3 ; encoding: [0x01,0x00,0x6a,0xd2,0x02,0x07,0x02,0x00]
v_cvt_scalef32_pk_bf16_bf8 v1, v2, v3

// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk_bf16_bf8 v1, v2, s3 ; encoding: [0x01,0x00,0x6a,0xd2,0x02,0x07,0x00,0x00]
v_cvt_scalef32_pk_bf16_bf8 v1, v2, s3

// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk_bf16_bf8 v1, s2, 3 ; encoding: [0x01,0x00,0x6a,0xd2,0x02,0x06,0x01,0x00]
v_cvt_scalef32_pk_bf16_bf8 v1, s2, 3

// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk_bf16_bf8 v1, v2, v3 op_sel:[1,0,0] ; encoding: [0x01,0x08,0x6a,0xd2,0x02,0x07,0x02,0x00]
v_cvt_scalef32_pk_bf16_bf8 v1, v2, v3 op_sel:[1,0,0]

// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk_bf16_bf8 v1, v2, s3 op_sel:[1,0,0] ; encoding: [0x01,0x08,0x6a,0xd2,0x02,0x07,0x00,0x00]
v_cvt_scalef32_pk_bf16_bf8 v1, v2, s3 op_sel:[1,0,0]

// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
// GFX950: v_cvt_scalef32_pk_bf16_bf8 v1, s2, 3 op_sel:[1,0,0] ; encoding: [0x01,0x08,0x6a,0xd2,0x02,0x06,0x01,0x00]
v_cvt_scalef32_pk_bf16_bf8 v1, s2, 3 op_sel:[1,0,0]
50 changes: 49 additions & 1 deletion llvm/test/MC/AMDGPU/gfx950_err.s
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Original file line number Diff line number Diff line change
Expand Up @@ -244,4 +244,52 @@ v_cvt_scalef32_pk32_fp6_f16 v[20:25], v[10:25], v8 mul:2
v_cvt_scalef32_pk32_fp6_f16 v[20:25], v[10:25], v8 div:2

// GFX950: :[[@LINE+1]]:{{[0-9]+}}: error: not a valid operand
v_cvt_scalef32_pk32_fp6_f16 v[20:25], v[10:25], v8 clamp div:2
v_cvt_scalef32_pk32_fp6_f16 v[20:25], v[10:25], v8 clamp div:2

// GFX950: :[[@LINE+1]]:{{[0-9]+}}: error: invalid operand for instruction
v_cvt_scalef32_pk_f16_fp8 v[20:25], v[10:25], v8 clamp

// GFX950: :[[@LINE+1]]:{{[0-9]+}}: error: not a valid operand
v_cvt_scalef32_pk_f16_fp8 v[20:25], v[10:25], v8 mul:2

// GFX950: :[[@LINE+1]]:{{[0-9]+}}: error: not a valid operand
v_cvt_scalef32_pk_f16_fp8 v[20:25], v[10:25], v8 div:2

// GFX950: :[[@LINE+1]]:{{[0-9]+}}: error: not a valid operand
v_cvt_scalef32_pk_f16_fp8 v[20:25], v[10:25], v8 clamp div:2

// GFX950: :[[@LINE+1]]:{{[0-9]+}}: error: invalid operand for instruction
v_cvt_scalef32_pk_f16_bf8 v[20:25], v[10:25], v8 clamp

// GFX950: :[[@LINE+1]]:{{[0-9]+}}: error: not a valid operand
v_cvt_scalef32_pk_f16_bf8 v[20:25], v[10:25], v8 mul:2

// GFX950: :[[@LINE+1]]:{{[0-9]+}}: error: not a valid operand
v_cvt_scalef32_pk_f16_bf8 v[20:25], v[10:25], v8 div:2

// GFX950: :[[@LINE+1]]:{{[0-9]+}}: error: not a valid operand
v_cvt_scalef32_pk_f16_bf8 v[20:25], v[10:25], v8 clamp div:2

// GFX950: :[[@LINE+1]]:{{[0-9]+}}: error: invalid operand for instruction
v_cvt_scalef32_pk_bf16_fp8 v[20:25], v[10:25], v8 clamp

// GFX950: :[[@LINE+1]]:{{[0-9]+}}: error: not a valid operand
v_cvt_scalef32_pk_bf16_fp8 v[20:25], v[10:25], v8 mul:2

// GFX950: :[[@LINE+1]]:{{[0-9]+}}: error: not a valid operand
v_cvt_scalef32_pk_bf16_fp8 v[20:25], v[10:25], v8 div:2

// GFX950: :[[@LINE+1]]:{{[0-9]+}}: error: not a valid operand
v_cvt_scalef32_pk_bf16_fp8 v[20:25], v[10:25], v8 clamp div:2

// GFX950: :[[@LINE+1]]:{{[0-9]+}}: error: invalid operand for instruction
v_cvt_scalef32_pk_bf16_bf8 v[20:25], v[10:25], v8 clamp

// GFX950: :[[@LINE+1]]:{{[0-9]+}}: error: not a valid operand
v_cvt_scalef32_pk_bf16_bf8 v[20:25], v[10:25], v8 mul:2

// GFX950: :[[@LINE+1]]:{{[0-9]+}}: error: not a valid operand
v_cvt_scalef32_pk_bf16_bf8 v[20:25], v[10:25], v8 div:2

// GFX950: :[[@LINE+1]]:{{[0-9]+}}: error: not a valid operand
v_cvt_scalef32_pk_bf16_bf8 v[20:25], v[10:25], v8 clamp div:2
72 changes: 72 additions & 0 deletions llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -641,3 +641,75 @@

# GFX950: v_cvt_scalef32_pk32_fp6_f16 v[20:25], v[10:25], v8 ; encoding: [0x14,0x00,0x58,0xd2,0x0a,0x11,0x02,0x00]
0x14,0x00,0x58,0xd2,0x0a,0x11,0x02,0x00

# GFX950: v_cvt_scalef32_pk_f16_fp8 v1, v2, v3 ; encoding: [0x01,0x00,0x48,0xd2,0x02,0x07,0x02,0x00]
0x01,0x00,0x48,0xd2,0x02,0x07,0x02,0x00

# GFX950: v_cvt_scalef32_pk_f16_fp8 v1, v2, s3 ; encoding: [0x01,0x00,0x48,0xd2,0x02,0x07,0x00,0x00]
0x01,0x00,0x48,0xd2,0x02,0x07,0x00,0x00

# GFX950: v_cvt_scalef32_pk_f16_fp8 v1, s2, 3 ; encoding: [0x01,0x00,0x48,0xd2,0x02,0x06,0x01,0x00]
0x01,0x00,0x48,0xd2,0x02,0x06,0x01,0x00

# GFX950: v_cvt_scalef32_pk_f16_fp8 v1, v2, v3 op_sel:[1,0,0] ; encoding: [0x01,0x08,0x48,0xd2,0x02,0x07,0x02,0x00]
0x01,0x08,0x48,0xd2,0x02,0x07,0x02,0x00

# GFX950: v_cvt_scalef32_pk_f16_fp8 v1, v2, s3 op_sel:[1,0,0] ; encoding: [0x01,0x08,0x48,0xd2,0x02,0x07,0x00,0x00]
0x01,0x08,0x48,0xd2,0x02,0x07,0x00,0x00

# GFX950: v_cvt_scalef32_pk_f16_fp8 v1, s2, 3 op_sel:[1,0,0] ; encoding: [0x01,0x08,0x48,0xd2,0x02,0x06,0x01,0x00]
0x01,0x08,0x48,0xd2,0x02,0x06,0x01,0x00

# GFX950: v_cvt_scalef32_pk_f16_bf8 v1, v2, v3 ; encoding: [0x01,0x00,0x49,0xd2,0x02,0x07,0x02,0x00]
0x01,0x00,0x49,0xd2,0x02,0x07,0x02,0x00

# GFX950: v_cvt_scalef32_pk_f16_bf8 v1, v2, s3 ; encoding: [0x01,0x00,0x49,0xd2,0x02,0x07,0x00,0x00]
0x01,0x00,0x49,0xd2,0x02,0x07,0x00,0x00

# GFX950: v_cvt_scalef32_pk_f16_bf8 v1, s2, 3 ; encoding: [0x01,0x00,0x49,0xd2,0x02,0x06,0x01,0x00]
0x01,0x00,0x49,0xd2,0x02,0x06,0x01,0x00

# GFX950: v_cvt_scalef32_pk_f16_bf8 v1, v2, v3 op_sel:[1,0,0] ; encoding: [0x01,0x08,0x49,0xd2,0x02,0x07,0x02,0x00]
0x01,0x08,0x49,0xd2,0x02,0x07,0x02,0x00

# GFX950: v_cvt_scalef32_pk_f16_bf8 v1, v2, s3 op_sel:[1,0,0] ; encoding: [0x01,0x08,0x49,0xd2,0x02,0x07,0x00,0x00]
0x01,0x08,0x49,0xd2,0x02,0x07,0x00,0x00

# GFX950: v_cvt_scalef32_pk_f16_bf8 v1, s2, 3 op_sel:[1,0,0] ; encoding: [0x01,0x08,0x49,0xd2,0x02,0x06,0x01,0x00]
0x01,0x08,0x49,0xd2,0x02,0x06,0x01,0x00

# GFX950: v_cvt_scalef32_pk_bf16_fp8 v1, v2, v3 ; encoding: [0x01,0x00,0x69,0xd2,0x02,0x07,0x02,0x00]
0x01,0x00,0x69,0xd2,0x02,0x07,0x02,0x00

# GFX950: v_cvt_scalef32_pk_bf16_fp8 v1, v2, s3 ; encoding: [0x01,0x00,0x69,0xd2,0x02,0x07,0x00,0x00]
0x01,0x00,0x69,0xd2,0x02,0x07,0x00,0x00

# GFX950: v_cvt_scalef32_pk_bf16_fp8 v1, s2, 3 ; encoding: [0x01,0x00,0x69,0xd2,0x02,0x06,0x01,0x00]
0x01,0x00,0x69,0xd2,0x02,0x06,0x01,0x00

# GFX950: v_cvt_scalef32_pk_bf16_fp8 v1, v2, v3 op_sel:[1,0,0] ; encoding: [0x01,0x08,0x69,0xd2,0x02,0x07,0x02,0x00]
0x01,0x08,0x69,0xd2,0x02,0x07,0x02,0x00

# GFX950: v_cvt_scalef32_pk_bf16_fp8 v1, v2, s3 op_sel:[1,0,0] ; encoding: [0x01,0x08,0x69,0xd2,0x02,0x07,0x00,0x00]
0x01,0x08,0x69,0xd2,0x02,0x07,0x00,0x00

# GFX950: v_cvt_scalef32_pk_bf16_fp8 v1, s2, 3 op_sel:[1,0,0] ; encoding: [0x01,0x08,0x69,0xd2,0x02,0x06,0x01,0x00]
0x01,0x08,0x69,0xd2,0x02,0x06,0x01,0x00

# GFX950: v_cvt_scalef32_pk_bf16_bf8 v1, v2, v3 ; encoding: [0x01,0x00,0x6a,0xd2,0x02,0x07,0x02,0x00]
0x01,0x00,0x6a,0xd2,0x02,0x07,0x02,0x00

# GFX950: v_cvt_scalef32_pk_bf16_bf8 v1, v2, s3 ; encoding: [0x01,0x00,0x6a,0xd2,0x02,0x07,0x00,0x00]
0x01,0x00,0x6a,0xd2,0x02,0x07,0x00,0x00

# GFX950: v_cvt_scalef32_pk_bf16_bf8 v1, s2, 3 ; encoding: [0x01,0x00,0x6a,0xd2,0x02,0x06,0x01,0x00]
0x01,0x00,0x6a,0xd2,0x02,0x06,0x01,0x00

# GFX950: v_cvt_scalef32_pk_bf16_bf8 v1, v2, v3 op_sel:[1,0,0] ; encoding: [0x01,0x08,0x6a,0xd2,0x02,0x07,0x02,0x00]
0x01,0x08,0x6a,0xd2,0x02,0x07,0x02,0x00

# GFX950: v_cvt_scalef32_pk_bf16_bf8 v1, v2, s3 op_sel:[1,0,0] ; encoding: [0x01,0x08,0x6a,0xd2,0x02,0x07,0x00,0x00]
0x01,0x08,0x6a,0xd2,0x02,0x07,0x00,0x00

# GFX950: v_cvt_scalef32_pk_bf16_bf8 v1, s2, 3 op_sel:[1,0,0] ; encoding: [0x01,0x08,0x6a,0xd2,0x02,0x06,0x01,0x00]
0x01,0x08,0x6a,0xd2,0x02,0x06,0x01,0x00
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