[X86][MC] Fix offset for R_X86_64_CODE_6_GOTTPOFF fixup #119496

fzou1 · 2024-12-11T04:02:29Z

Fix the offset for R_X86_64_CODE_6_GOTTPOFF fixup, which is introduced by [X86][MC] Add R_X86_64_CODE_6_GOTTPOFF #117277. It should be biased with the size of the immediate field. Related tests are updated.
Rename reloc_riprel_6byte_relax to reloc_riprel_4byte_relax_evex as the number of bytes represents the size of fixup. And add "evex" suffix as it's used for APX NDD/NF instructions with EVEX prefix.
Remove incorrectly setting R_X86_64_CODE_6_GOTTPOFF relocation type for APX NDD/NF instructions with GOTPCREL symbol reference modifier.

1. Fix the offset as it's counted back from the end of the instruction. Related tests are updated. 2. Rename reloc_riprel_6byte_relax to reloc_riprel_4byte_relax_evex as the number of bytes represents the size of fixup. And add "evex" suffix as it's used for APX NDD/NF instructions with EVEX prefix. 3. Remove incorrectly setting R_X86_64_CODE_6_GOTTPOFF relocation type for APX NDD/NF instructions with GOTPCREL symbol reference modifier.

llvmbot · 2024-12-11T04:03:04Z

@llvm/pr-subscribers-lld

@llvm/pr-subscribers-mc

Author: Feng Zou (fzou1)

Changes

Fix the offset as it's counted back from the end of the instruction. Related tests are updated.
Rename reloc_riprel_6byte_relax to reloc_riprel_4byte_relax_evex as the number of bytes represents the size of fixup. And add "evex" suffix as it's used for APX NDD/NF instructions with EVEX prefix.
Remove incorrectly setting R_X86_64_CODE_6_GOTTPOFF relocation type for APX NDD/NF instructions with GOTPCREL symbol reference modifier.

Full diff: https://github.com/llvm/llvm-project/pull/119496.diff

9 Files Affected:

(modified) lld/test/ELF/tls-opt.s (+9-9)
(modified) lld/test/ELF/x86-64-tls-ie-local.s (+10-10)
(modified) llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp (+2-2)
(modified) llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp (+2-4)
(modified) llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h (+3-2)
(modified) llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp (+4-4)
(modified) llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp (+2-2)
(modified) llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp (+1-1)
(modified) llvm/test/MC/ELF/relocation.s (+5-5)

diff --git a/lld/test/ELF/tls-opt.s b/lld/test/ELF/tls-opt.s
index 08cc52afd6411e..466dda0ef2e7b8 100644
--- a/lld/test/ELF/tls-opt.s
+++ b/lld/test/ELF/tls-opt.s
@@ -28,17 +28,17 @@
 // DISASM-NEXT:   addq $-8, %r28
 // DISASM-NEXT:   addq $-4, %r16
 # NDD
-// DISASM-NEXT:   addq $-10, %r16, %r16
-// DISASM-NEXT:   addq $-10, %r16, %r20
-// DISASM-NEXT:   addq $-10, %r16, %rax
-// DISASM-NEXT:   addq $-10, %rax, %r16
-// DISASM-NEXT:   addq $-10, %r8, %r16
-// DISASM-NEXT:   addq $-10, %rax, %r12
+// DISASM-NEXT:   addq $-8, %r16, %r16
+// DISASM-NEXT:   addq $-8, %r16, %r20
+// DISASM-NEXT:   addq $-8, %r16, %rax
+// DISASM-NEXT:   addq $-8, %rax, %r16
+// DISASM-NEXT:   addq $-8, %r8, %r16
+// DISASM-NEXT:   addq $-8, %rax, %r12
 # NDD + NF
-// DISASM-NEXT:   {nf} addq $-10, %r8, %r16
-// DISASM-NEXT:   {nf} addq $-10, %rax, %r12
+// DISASM-NEXT:   {nf} addq $-8, %r8, %r16
+// DISASM-NEXT:   {nf} addq $-8, %rax, %r12
 # NF
-// DISASM-NEXT:   {nf} addq $-10, %r12
+// DISASM-NEXT:   {nf} addq $-8, %r12
 
 // LD to LE:
 // DISASM-NEXT:   movq %fs:0, %rax
diff --git a/lld/test/ELF/x86-64-tls-ie-local.s b/lld/test/ELF/x86-64-tls-ie-local.s
index 0a104e7d67277a..704ecacc961929 100644
--- a/lld/test/ELF/x86-64-tls-ie-local.s
+++ b/lld/test/ELF/x86-64-tls-ie-local.s
@@ -17,21 +17,21 @@
 ## &.got[1] - 0x1286 = 0x2380 - 0x1286 = 4346
 ## &.got[2] - 0x128e = 0x2378 - 0x128e = 4330
 ## &.got[3] - 0x1296 = 0x2380 - 0x1296 = 4330
-## &.got[0] - 0x12a0 = 0x2376 - 0x12a0 = 4310
-## &.got[1] - 0x12aa = 0x237e - 0x12aa = 4308
-## &.got[0] - 0x12b4 = 0x2376 - 0x12b4 = 4290
-## &.got[1] - 0x12be = 0x237e - 0x12be = 4288
-## &.got[0] - 0x12c8 = 0x2376 - 0x12c8 = 4270
+## &.got[0] - 0x12a0 = 0x2378 - 0x12a0 = 4312
+## &.got[1] - 0x12aa = 0x2380 - 0x12aa = 4310
+## &.got[0] - 0x12b4 = 0x2378 - 0x12b4 = 4292
+## &.got[1] - 0x12be = 0x2380 - 0x12be = 4290
+## &.got[0] - 0x12c8 = 0x2378 - 0x12c8 = 4272
 
 # CHECK:      1278:       addq 4345(%rip), %rax
 # CHECK-NEXT: 127f:       addq 4346(%rip), %rax
 # CHECK-NEXT: 1286:       addq 4330(%rip), %r16
 # CHECK-NEXT: 128e:       addq 4330(%rip), %r16
-# CHECK-NEXT: 1296:       addq %r8, 4310(%rip), %r16
-# CHECK-NEXT: 12a0:       addq 4308(%rip), %rax, %r12
-# CHECK-NEXT: 12aa:       {nf} addq %r8, 4290(%rip), %r16
-# CHECK-NEXT: 12b4:       {nf} addq 4288(%rip), %rax, %r12
-# CHECK-NEXT: 12be:       {nf} addq 4270(%rip), %r12
+# CHECK-NEXT: 1296:       addq %r8, 4312(%rip), %r16
+# CHECK-NEXT: 12a0:       addq 4310(%rip), %rax, %r12
+# CHECK-NEXT: 12aa:       {nf} addq %r8, 4292(%rip), %r16
+# CHECK-NEXT: 12b4:       {nf} addq 4290(%rip), %rax, %r12
+# CHECK-NEXT: 12be:       {nf} addq 4272(%rip), %r12
 
 addq foo@GOTTPOFF(%rip), %rax
 addq bar@GOTTPOFF(%rip), %rax
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
index 01b6c84419fc88..ef917568b5a50a 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
@@ -634,7 +634,7 @@ const MCFixupKindInfo &X86AsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
       {"reloc_riprel_4byte_relax", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
       {"reloc_riprel_4byte_relax_rex", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
       {"reloc_riprel_4byte_relax_rex2", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
-      {"reloc_riprel_6byte_relax", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
+      {"reloc_riprel_4byte_relax_evex", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
       {"reloc_signed_4byte", 0, 32, 0},
       {"reloc_signed_4byte_relax", 0, 32, 0},
       {"reloc_global_offset_table", 0, 32, 0},
@@ -684,7 +684,7 @@ static unsigned getFixupKindSize(unsigned Kind) {
   case X86::reloc_riprel_4byte_relax_rex2:
   case X86::reloc_riprel_4byte_movq_load:
   case X86::reloc_riprel_4byte_movq_load_rex2:
-  case X86::reloc_riprel_6byte_relax:
+  case X86::reloc_riprel_4byte_relax_evex:
   case X86::reloc_signed_4byte:
   case X86::reloc_signed_4byte_relax:
   case X86::reloc_global_offset_table:
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
index 29a1af97d24fa9..cc712055a86155 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
@@ -77,7 +77,7 @@ static X86_64RelType getType64(MCFixupKind Kind,
   case X86::reloc_riprel_4byte_relax_rex2:
   case X86::reloc_riprel_4byte_movq_load:
   case X86::reloc_riprel_4byte_movq_load_rex2:
-  case X86::reloc_riprel_6byte_relax:
+  case X86::reloc_riprel_4byte_relax_evex:
     return RT64_32;
   case X86::reloc_branch_4byte_pcrel:
     Modifier = MCSymbolRefExpr::VK_PLT;
@@ -203,7 +203,7 @@ static unsigned getRelocType64(MCContext &Ctx, SMLoc Loc,
     if ((unsigned)Kind == X86::reloc_riprel_4byte_movq_load_rex2 ||
         (unsigned)Kind == X86::reloc_riprel_4byte_relax_rex2)
       return ELF::R_X86_64_CODE_4_GOTTPOFF;
-    else if ((unsigned)Kind == X86::reloc_riprel_6byte_relax)
+    else if ((unsigned)Kind == X86::reloc_riprel_4byte_relax_evex)
       return ELF::R_X86_64_CODE_6_GOTTPOFF;
     return ELF::R_X86_64_GOTTPOFF;
   case MCSymbolRefExpr::VK_TLSLD:
@@ -230,8 +230,6 @@ static unsigned getRelocType64(MCContext &Ctx, SMLoc Loc,
     case X86::reloc_riprel_4byte_relax_rex2:
     case X86::reloc_riprel_4byte_movq_load_rex2:
       return ELF::R_X86_64_CODE_4_GOTPCRELX;
-    case X86::reloc_riprel_6byte_relax:
-      return ELF::R_X86_64_CODE_6_GOTTPOFF;
     }
     llvm_unreachable("unexpected relocation type!");
   case MCSymbolRefExpr::VK_GOTPCREL_NORELAX:
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h b/llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h
index 52592a5a13b978..9b951973ab1949 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h
@@ -24,8 +24,9 @@ enum Fixups {
                                              // instruction with rex prefix
   reloc_riprel_4byte_relax_rex2,             // 32-bit rip-relative in relaxable
                                              // instruction with rex2 prefix
-  reloc_riprel_6byte_relax,                  // 32-bit rip-relative in relaxable
-                                             // instruction with APX NDD
+  reloc_riprel_4byte_relax_evex,             // 32-bit rip-relative in relaxable
+                                             // instruction of APX NDD/NF with
+                                             // EVEX prefix
   reloc_signed_4byte,                        // 32-bit signed. Unlike FK_Data_4
                                              // this will be sign extended at
                                              // runtime.
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
index 052d732e4d0190..55fb9f54c53979 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -572,15 +572,15 @@ void X86MCCodeEmitter::emitImmediate(const MCOperand &DispOp, SMLoc Loc,
       FixupKind == MCFixupKind(X86::reloc_riprel_4byte_relax) ||
       FixupKind == MCFixupKind(X86::reloc_riprel_4byte_relax_rex) ||
       FixupKind == MCFixupKind(X86::reloc_riprel_4byte_relax_rex2) ||
-      FixupKind == MCFixupKind(X86::reloc_branch_4byte_pcrel)) {
+      FixupKind == MCFixupKind(X86::reloc_branch_4byte_pcrel) ||
+      FixupKind == MCFixupKind(X86::reloc_riprel_4byte_relax_evex)) {
     ImmOffset -= 4;
     // If this is a pc-relative load off _GLOBAL_OFFSET_TABLE_:
     // leaq _GLOBAL_OFFSET_TABLE_(%rip), %r15
     // this needs to be a GOTPC32 relocation.
     if (startsWithGlobalOffsetTable(Expr) != GOT_None)
       FixupKind = MCFixupKind(X86::reloc_global_offset_table);
-  } else if (FixupKind == MCFixupKind(X86::reloc_riprel_6byte_relax))
-    ImmOffset -= 6;
+  }
 
   if (FixupKind == FK_PCRel_2)
     ImmOffset -= 2;
@@ -677,7 +677,7 @@ void X86MCCodeEmitter::emitMemModRMByte(
       case X86::ADD64mr_ND:
       case X86::ADD64mr_NF_ND:
       case X86::ADD64rm_NF_ND:
-        return X86::reloc_riprel_6byte_relax;
+        return X86::reloc_riprel_4byte_relax_evex;
       }
     }();
 
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp
index 413650e90de657..69eeb09ebf2dcc 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp
@@ -70,7 +70,7 @@ static bool isFixupKindRIPRel(unsigned Kind) {
          Kind == X86::reloc_riprel_4byte_relax ||
          Kind == X86::reloc_riprel_4byte_relax_rex ||
          Kind == X86::reloc_riprel_4byte_relax_rex2 ||
-         Kind == X86::reloc_riprel_6byte_relax;
+         Kind == X86::reloc_riprel_4byte_relax_evex;
 }
 
 static unsigned getFixupKindLog2Size(unsigned Kind) {
@@ -92,7 +92,7 @@ static unsigned getFixupKindLog2Size(unsigned Kind) {
   case X86::reloc_signed_4byte:
   case X86::reloc_signed_4byte_relax:
   case X86::reloc_branch_4byte_pcrel:
-  case X86::reloc_riprel_6byte_relax:
+  case X86::reloc_riprel_4byte_relax_evex:
   case FK_Data_4: return 2;
   case FK_Data_8: return 3;
   }
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
index 48d4707bbe1ebd..f4ac242e9f1562 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
@@ -70,7 +70,7 @@ unsigned X86WinCOFFObjectWriter::getRelocType(MCContext &Ctx,
     case X86::reloc_riprel_4byte_relax:
     case X86::reloc_riprel_4byte_relax_rex:
     case X86::reloc_riprel_4byte_relax_rex2:
-    case X86::reloc_riprel_6byte_relax:
+    case X86::reloc_riprel_4byte_relax_evex:
     case X86::reloc_branch_4byte_pcrel:
       return COFF::IMAGE_REL_AMD64_REL32;
     case FK_Data_4:
diff --git a/llvm/test/MC/ELF/relocation.s b/llvm/test/MC/ELF/relocation.s
index 25497a003f8538..65a9b6f72d0aa8 100644
--- a/llvm/test/MC/ELF/relocation.s
+++ b/llvm/test/MC/ELF/relocation.s
@@ -90,11 +90,11 @@ weak_sym:
 // CHECK-NEXT:       0x2D R_X86_64_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
 // CHECK-NEXT:       0x35 R_X86_64_CODE_4_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
 // CHECK-NEXT:       0x3D R_X86_64_CODE_4_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
-// CHECK-NEXT:       0x47 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
-// CHECK-NEXT:       0x51 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
-// CHECK-NEXT:       0x5B R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
-// CHECK-NEXT:       0x65 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
-// CHECK-NEXT:       0x6F R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
+// CHECK-NEXT:       0x47 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
+// CHECK-NEXT:       0x51 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
+// CHECK-NEXT:       0x5B R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
+// CHECK-NEXT:       0x65 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
+// CHECK-NEXT:       0x6F R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
 // CHECK-NEXT:       0x76 R_X86_64_TLSGD    foo 0xFFFFFFFFFFFFFFFC
 // CHECK-NEXT:       0x7D R_X86_64_TPOFF32  foo 0x0
 // CHECK-NEXT:       0x84 R_X86_64_TLSLD    foo 0xFFFFFFFFFFFFFFFC

llvmbot · 2024-12-11T04:03:04Z

@llvm/pr-subscribers-lld-elf

Author: Feng Zou (fzou1)

Changes

Fix the offset as it's counted back from the end of the instruction. Related tests are updated.
Rename reloc_riprel_6byte_relax to reloc_riprel_4byte_relax_evex as the number of bytes represents the size of fixup. And add "evex" suffix as it's used for APX NDD/NF instructions with EVEX prefix.
Remove incorrectly setting R_X86_64_CODE_6_GOTTPOFF relocation type for APX NDD/NF instructions with GOTPCREL symbol reference modifier.

Full diff: https://github.com/llvm/llvm-project/pull/119496.diff

9 Files Affected:

(modified) lld/test/ELF/tls-opt.s (+9-9)
(modified) lld/test/ELF/x86-64-tls-ie-local.s (+10-10)
(modified) llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp (+2-2)
(modified) llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp (+2-4)
(modified) llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h (+3-2)
(modified) llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp (+4-4)
(modified) llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp (+2-2)
(modified) llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp (+1-1)
(modified) llvm/test/MC/ELF/relocation.s (+5-5)

diff --git a/lld/test/ELF/tls-opt.s b/lld/test/ELF/tls-opt.s
index 08cc52afd6411e..466dda0ef2e7b8 100644
--- a/lld/test/ELF/tls-opt.s
+++ b/lld/test/ELF/tls-opt.s
@@ -28,17 +28,17 @@
 // DISASM-NEXT:   addq $-8, %r28
 // DISASM-NEXT:   addq $-4, %r16
 # NDD
-// DISASM-NEXT:   addq $-10, %r16, %r16
-// DISASM-NEXT:   addq $-10, %r16, %r20
-// DISASM-NEXT:   addq $-10, %r16, %rax
-// DISASM-NEXT:   addq $-10, %rax, %r16
-// DISASM-NEXT:   addq $-10, %r8, %r16
-// DISASM-NEXT:   addq $-10, %rax, %r12
+// DISASM-NEXT:   addq $-8, %r16, %r16
+// DISASM-NEXT:   addq $-8, %r16, %r20
+// DISASM-NEXT:   addq $-8, %r16, %rax
+// DISASM-NEXT:   addq $-8, %rax, %r16
+// DISASM-NEXT:   addq $-8, %r8, %r16
+// DISASM-NEXT:   addq $-8, %rax, %r12
 # NDD + NF
-// DISASM-NEXT:   {nf} addq $-10, %r8, %r16
-// DISASM-NEXT:   {nf} addq $-10, %rax, %r12
+// DISASM-NEXT:   {nf} addq $-8, %r8, %r16
+// DISASM-NEXT:   {nf} addq $-8, %rax, %r12
 # NF
-// DISASM-NEXT:   {nf} addq $-10, %r12
+// DISASM-NEXT:   {nf} addq $-8, %r12
 
 // LD to LE:
 // DISASM-NEXT:   movq %fs:0, %rax
diff --git a/lld/test/ELF/x86-64-tls-ie-local.s b/lld/test/ELF/x86-64-tls-ie-local.s
index 0a104e7d67277a..704ecacc961929 100644
--- a/lld/test/ELF/x86-64-tls-ie-local.s
+++ b/lld/test/ELF/x86-64-tls-ie-local.s
@@ -17,21 +17,21 @@
 ## &.got[1] - 0x1286 = 0x2380 - 0x1286 = 4346
 ## &.got[2] - 0x128e = 0x2378 - 0x128e = 4330
 ## &.got[3] - 0x1296 = 0x2380 - 0x1296 = 4330
-## &.got[0] - 0x12a0 = 0x2376 - 0x12a0 = 4310
-## &.got[1] - 0x12aa = 0x237e - 0x12aa = 4308
-## &.got[0] - 0x12b4 = 0x2376 - 0x12b4 = 4290
-## &.got[1] - 0x12be = 0x237e - 0x12be = 4288
-## &.got[0] - 0x12c8 = 0x2376 - 0x12c8 = 4270
+## &.got[0] - 0x12a0 = 0x2378 - 0x12a0 = 4312
+## &.got[1] - 0x12aa = 0x2380 - 0x12aa = 4310
+## &.got[0] - 0x12b4 = 0x2378 - 0x12b4 = 4292
+## &.got[1] - 0x12be = 0x2380 - 0x12be = 4290
+## &.got[0] - 0x12c8 = 0x2378 - 0x12c8 = 4272
 
 # CHECK:      1278:       addq 4345(%rip), %rax
 # CHECK-NEXT: 127f:       addq 4346(%rip), %rax
 # CHECK-NEXT: 1286:       addq 4330(%rip), %r16
 # CHECK-NEXT: 128e:       addq 4330(%rip), %r16
-# CHECK-NEXT: 1296:       addq %r8, 4310(%rip), %r16
-# CHECK-NEXT: 12a0:       addq 4308(%rip), %rax, %r12
-# CHECK-NEXT: 12aa:       {nf} addq %r8, 4290(%rip), %r16
-# CHECK-NEXT: 12b4:       {nf} addq 4288(%rip), %rax, %r12
-# CHECK-NEXT: 12be:       {nf} addq 4270(%rip), %r12
+# CHECK-NEXT: 1296:       addq %r8, 4312(%rip), %r16
+# CHECK-NEXT: 12a0:       addq 4310(%rip), %rax, %r12
+# CHECK-NEXT: 12aa:       {nf} addq %r8, 4292(%rip), %r16
+# CHECK-NEXT: 12b4:       {nf} addq 4290(%rip), %rax, %r12
+# CHECK-NEXT: 12be:       {nf} addq 4272(%rip), %r12
 
 addq foo@GOTTPOFF(%rip), %rax
 addq bar@GOTTPOFF(%rip), %rax
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
index 01b6c84419fc88..ef917568b5a50a 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
@@ -634,7 +634,7 @@ const MCFixupKindInfo &X86AsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
       {"reloc_riprel_4byte_relax", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
       {"reloc_riprel_4byte_relax_rex", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
       {"reloc_riprel_4byte_relax_rex2", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
-      {"reloc_riprel_6byte_relax", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
+      {"reloc_riprel_4byte_relax_evex", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
       {"reloc_signed_4byte", 0, 32, 0},
       {"reloc_signed_4byte_relax", 0, 32, 0},
       {"reloc_global_offset_table", 0, 32, 0},
@@ -684,7 +684,7 @@ static unsigned getFixupKindSize(unsigned Kind) {
   case X86::reloc_riprel_4byte_relax_rex2:
   case X86::reloc_riprel_4byte_movq_load:
   case X86::reloc_riprel_4byte_movq_load_rex2:
-  case X86::reloc_riprel_6byte_relax:
+  case X86::reloc_riprel_4byte_relax_evex:
   case X86::reloc_signed_4byte:
   case X86::reloc_signed_4byte_relax:
   case X86::reloc_global_offset_table:
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
index 29a1af97d24fa9..cc712055a86155 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
@@ -77,7 +77,7 @@ static X86_64RelType getType64(MCFixupKind Kind,
   case X86::reloc_riprel_4byte_relax_rex2:
   case X86::reloc_riprel_4byte_movq_load:
   case X86::reloc_riprel_4byte_movq_load_rex2:
-  case X86::reloc_riprel_6byte_relax:
+  case X86::reloc_riprel_4byte_relax_evex:
     return RT64_32;
   case X86::reloc_branch_4byte_pcrel:
     Modifier = MCSymbolRefExpr::VK_PLT;
@@ -203,7 +203,7 @@ static unsigned getRelocType64(MCContext &Ctx, SMLoc Loc,
     if ((unsigned)Kind == X86::reloc_riprel_4byte_movq_load_rex2 ||
         (unsigned)Kind == X86::reloc_riprel_4byte_relax_rex2)
       return ELF::R_X86_64_CODE_4_GOTTPOFF;
-    else if ((unsigned)Kind == X86::reloc_riprel_6byte_relax)
+    else if ((unsigned)Kind == X86::reloc_riprel_4byte_relax_evex)
       return ELF::R_X86_64_CODE_6_GOTTPOFF;
     return ELF::R_X86_64_GOTTPOFF;
   case MCSymbolRefExpr::VK_TLSLD:
@@ -230,8 +230,6 @@ static unsigned getRelocType64(MCContext &Ctx, SMLoc Loc,
     case X86::reloc_riprel_4byte_relax_rex2:
     case X86::reloc_riprel_4byte_movq_load_rex2:
       return ELF::R_X86_64_CODE_4_GOTPCRELX;
-    case X86::reloc_riprel_6byte_relax:
-      return ELF::R_X86_64_CODE_6_GOTTPOFF;
     }
     llvm_unreachable("unexpected relocation type!");
   case MCSymbolRefExpr::VK_GOTPCREL_NORELAX:
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h b/llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h
index 52592a5a13b978..9b951973ab1949 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h
@@ -24,8 +24,9 @@ enum Fixups {
                                              // instruction with rex prefix
   reloc_riprel_4byte_relax_rex2,             // 32-bit rip-relative in relaxable
                                              // instruction with rex2 prefix
-  reloc_riprel_6byte_relax,                  // 32-bit rip-relative in relaxable
-                                             // instruction with APX NDD
+  reloc_riprel_4byte_relax_evex,             // 32-bit rip-relative in relaxable
+                                             // instruction of APX NDD/NF with
+                                             // EVEX prefix
   reloc_signed_4byte,                        // 32-bit signed. Unlike FK_Data_4
                                              // this will be sign extended at
                                              // runtime.
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
index 052d732e4d0190..55fb9f54c53979 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -572,15 +572,15 @@ void X86MCCodeEmitter::emitImmediate(const MCOperand &DispOp, SMLoc Loc,
       FixupKind == MCFixupKind(X86::reloc_riprel_4byte_relax) ||
       FixupKind == MCFixupKind(X86::reloc_riprel_4byte_relax_rex) ||
       FixupKind == MCFixupKind(X86::reloc_riprel_4byte_relax_rex2) ||
-      FixupKind == MCFixupKind(X86::reloc_branch_4byte_pcrel)) {
+      FixupKind == MCFixupKind(X86::reloc_branch_4byte_pcrel) ||
+      FixupKind == MCFixupKind(X86::reloc_riprel_4byte_relax_evex)) {
     ImmOffset -= 4;
     // If this is a pc-relative load off _GLOBAL_OFFSET_TABLE_:
     // leaq _GLOBAL_OFFSET_TABLE_(%rip), %r15
     // this needs to be a GOTPC32 relocation.
     if (startsWithGlobalOffsetTable(Expr) != GOT_None)
       FixupKind = MCFixupKind(X86::reloc_global_offset_table);
-  } else if (FixupKind == MCFixupKind(X86::reloc_riprel_6byte_relax))
-    ImmOffset -= 6;
+  }
 
   if (FixupKind == FK_PCRel_2)
     ImmOffset -= 2;
@@ -677,7 +677,7 @@ void X86MCCodeEmitter::emitMemModRMByte(
       case X86::ADD64mr_ND:
       case X86::ADD64mr_NF_ND:
       case X86::ADD64rm_NF_ND:
-        return X86::reloc_riprel_6byte_relax;
+        return X86::reloc_riprel_4byte_relax_evex;
       }
     }();
 
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp
index 413650e90de657..69eeb09ebf2dcc 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp
@@ -70,7 +70,7 @@ static bool isFixupKindRIPRel(unsigned Kind) {
          Kind == X86::reloc_riprel_4byte_relax ||
          Kind == X86::reloc_riprel_4byte_relax_rex ||
          Kind == X86::reloc_riprel_4byte_relax_rex2 ||
-         Kind == X86::reloc_riprel_6byte_relax;
+         Kind == X86::reloc_riprel_4byte_relax_evex;
 }
 
 static unsigned getFixupKindLog2Size(unsigned Kind) {
@@ -92,7 +92,7 @@ static unsigned getFixupKindLog2Size(unsigned Kind) {
   case X86::reloc_signed_4byte:
   case X86::reloc_signed_4byte_relax:
   case X86::reloc_branch_4byte_pcrel:
-  case X86::reloc_riprel_6byte_relax:
+  case X86::reloc_riprel_4byte_relax_evex:
   case FK_Data_4: return 2;
   case FK_Data_8: return 3;
   }
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
index 48d4707bbe1ebd..f4ac242e9f1562 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
@@ -70,7 +70,7 @@ unsigned X86WinCOFFObjectWriter::getRelocType(MCContext &Ctx,
     case X86::reloc_riprel_4byte_relax:
     case X86::reloc_riprel_4byte_relax_rex:
     case X86::reloc_riprel_4byte_relax_rex2:
-    case X86::reloc_riprel_6byte_relax:
+    case X86::reloc_riprel_4byte_relax_evex:
     case X86::reloc_branch_4byte_pcrel:
       return COFF::IMAGE_REL_AMD64_REL32;
     case FK_Data_4:
diff --git a/llvm/test/MC/ELF/relocation.s b/llvm/test/MC/ELF/relocation.s
index 25497a003f8538..65a9b6f72d0aa8 100644
--- a/llvm/test/MC/ELF/relocation.s
+++ b/llvm/test/MC/ELF/relocation.s
@@ -90,11 +90,11 @@ weak_sym:
 // CHECK-NEXT:       0x2D R_X86_64_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
 // CHECK-NEXT:       0x35 R_X86_64_CODE_4_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
 // CHECK-NEXT:       0x3D R_X86_64_CODE_4_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
-// CHECK-NEXT:       0x47 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
-// CHECK-NEXT:       0x51 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
-// CHECK-NEXT:       0x5B R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
-// CHECK-NEXT:       0x65 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
-// CHECK-NEXT:       0x6F R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
+// CHECK-NEXT:       0x47 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
+// CHECK-NEXT:       0x51 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
+// CHECK-NEXT:       0x5B R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
+// CHECK-NEXT:       0x65 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
+// CHECK-NEXT:       0x6F R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
 // CHECK-NEXT:       0x76 R_X86_64_TLSGD    foo 0xFFFFFFFFFFFFFFFC
 // CHECK-NEXT:       0x7D R_X86_64_TPOFF32  foo 0x0
 // CHECK-NEXT:       0x84 R_X86_64_TLSLD    foo 0xFFFFFFFFFFFFFFFC

llvmbot · 2024-12-11T04:03:05Z

@llvm/pr-subscribers-backend-x86

Author: Feng Zou (fzou1)

Changes

Fix the offset as it's counted back from the end of the instruction. Related tests are updated.
Rename reloc_riprel_6byte_relax to reloc_riprel_4byte_relax_evex as the number of bytes represents the size of fixup. And add "evex" suffix as it's used for APX NDD/NF instructions with EVEX prefix.
Remove incorrectly setting R_X86_64_CODE_6_GOTTPOFF relocation type for APX NDD/NF instructions with GOTPCREL symbol reference modifier.

Full diff: https://github.com/llvm/llvm-project/pull/119496.diff

9 Files Affected:

(modified) lld/test/ELF/tls-opt.s (+9-9)
(modified) lld/test/ELF/x86-64-tls-ie-local.s (+10-10)
(modified) llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp (+2-2)
(modified) llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp (+2-4)
(modified) llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h (+3-2)
(modified) llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp (+4-4)
(modified) llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp (+2-2)
(modified) llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp (+1-1)
(modified) llvm/test/MC/ELF/relocation.s (+5-5)

diff --git a/lld/test/ELF/tls-opt.s b/lld/test/ELF/tls-opt.s
index 08cc52afd6411e..466dda0ef2e7b8 100644
--- a/lld/test/ELF/tls-opt.s
+++ b/lld/test/ELF/tls-opt.s
@@ -28,17 +28,17 @@
 // DISASM-NEXT:   addq $-8, %r28
 // DISASM-NEXT:   addq $-4, %r16
 # NDD
-// DISASM-NEXT:   addq $-10, %r16, %r16
-// DISASM-NEXT:   addq $-10, %r16, %r20
-// DISASM-NEXT:   addq $-10, %r16, %rax
-// DISASM-NEXT:   addq $-10, %rax, %r16
-// DISASM-NEXT:   addq $-10, %r8, %r16
-// DISASM-NEXT:   addq $-10, %rax, %r12
+// DISASM-NEXT:   addq $-8, %r16, %r16
+// DISASM-NEXT:   addq $-8, %r16, %r20
+// DISASM-NEXT:   addq $-8, %r16, %rax
+// DISASM-NEXT:   addq $-8, %rax, %r16
+// DISASM-NEXT:   addq $-8, %r8, %r16
+// DISASM-NEXT:   addq $-8, %rax, %r12
 # NDD + NF
-// DISASM-NEXT:   {nf} addq $-10, %r8, %r16
-// DISASM-NEXT:   {nf} addq $-10, %rax, %r12
+// DISASM-NEXT:   {nf} addq $-8, %r8, %r16
+// DISASM-NEXT:   {nf} addq $-8, %rax, %r12
 # NF
-// DISASM-NEXT:   {nf} addq $-10, %r12
+// DISASM-NEXT:   {nf} addq $-8, %r12
 
 // LD to LE:
 // DISASM-NEXT:   movq %fs:0, %rax
diff --git a/lld/test/ELF/x86-64-tls-ie-local.s b/lld/test/ELF/x86-64-tls-ie-local.s
index 0a104e7d67277a..704ecacc961929 100644
--- a/lld/test/ELF/x86-64-tls-ie-local.s
+++ b/lld/test/ELF/x86-64-tls-ie-local.s
@@ -17,21 +17,21 @@
 ## &.got[1] - 0x1286 = 0x2380 - 0x1286 = 4346
 ## &.got[2] - 0x128e = 0x2378 - 0x128e = 4330
 ## &.got[3] - 0x1296 = 0x2380 - 0x1296 = 4330
-## &.got[0] - 0x12a0 = 0x2376 - 0x12a0 = 4310
-## &.got[1] - 0x12aa = 0x237e - 0x12aa = 4308
-## &.got[0] - 0x12b4 = 0x2376 - 0x12b4 = 4290
-## &.got[1] - 0x12be = 0x237e - 0x12be = 4288
-## &.got[0] - 0x12c8 = 0x2376 - 0x12c8 = 4270
+## &.got[0] - 0x12a0 = 0x2378 - 0x12a0 = 4312
+## &.got[1] - 0x12aa = 0x2380 - 0x12aa = 4310
+## &.got[0] - 0x12b4 = 0x2378 - 0x12b4 = 4292
+## &.got[1] - 0x12be = 0x2380 - 0x12be = 4290
+## &.got[0] - 0x12c8 = 0x2378 - 0x12c8 = 4272
 
 # CHECK:      1278:       addq 4345(%rip), %rax
 # CHECK-NEXT: 127f:       addq 4346(%rip), %rax
 # CHECK-NEXT: 1286:       addq 4330(%rip), %r16
 # CHECK-NEXT: 128e:       addq 4330(%rip), %r16
-# CHECK-NEXT: 1296:       addq %r8, 4310(%rip), %r16
-# CHECK-NEXT: 12a0:       addq 4308(%rip), %rax, %r12
-# CHECK-NEXT: 12aa:       {nf} addq %r8, 4290(%rip), %r16
-# CHECK-NEXT: 12b4:       {nf} addq 4288(%rip), %rax, %r12
-# CHECK-NEXT: 12be:       {nf} addq 4270(%rip), %r12
+# CHECK-NEXT: 1296:       addq %r8, 4312(%rip), %r16
+# CHECK-NEXT: 12a0:       addq 4310(%rip), %rax, %r12
+# CHECK-NEXT: 12aa:       {nf} addq %r8, 4292(%rip), %r16
+# CHECK-NEXT: 12b4:       {nf} addq 4290(%rip), %rax, %r12
+# CHECK-NEXT: 12be:       {nf} addq 4272(%rip), %r12
 
 addq foo@GOTTPOFF(%rip), %rax
 addq bar@GOTTPOFF(%rip), %rax
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
index 01b6c84419fc88..ef917568b5a50a 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
@@ -634,7 +634,7 @@ const MCFixupKindInfo &X86AsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
       {"reloc_riprel_4byte_relax", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
       {"reloc_riprel_4byte_relax_rex", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
       {"reloc_riprel_4byte_relax_rex2", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
-      {"reloc_riprel_6byte_relax", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
+      {"reloc_riprel_4byte_relax_evex", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
       {"reloc_signed_4byte", 0, 32, 0},
       {"reloc_signed_4byte_relax", 0, 32, 0},
       {"reloc_global_offset_table", 0, 32, 0},
@@ -684,7 +684,7 @@ static unsigned getFixupKindSize(unsigned Kind) {
   case X86::reloc_riprel_4byte_relax_rex2:
   case X86::reloc_riprel_4byte_movq_load:
   case X86::reloc_riprel_4byte_movq_load_rex2:
-  case X86::reloc_riprel_6byte_relax:
+  case X86::reloc_riprel_4byte_relax_evex:
   case X86::reloc_signed_4byte:
   case X86::reloc_signed_4byte_relax:
   case X86::reloc_global_offset_table:
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
index 29a1af97d24fa9..cc712055a86155 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
@@ -77,7 +77,7 @@ static X86_64RelType getType64(MCFixupKind Kind,
   case X86::reloc_riprel_4byte_relax_rex2:
   case X86::reloc_riprel_4byte_movq_load:
   case X86::reloc_riprel_4byte_movq_load_rex2:
-  case X86::reloc_riprel_6byte_relax:
+  case X86::reloc_riprel_4byte_relax_evex:
     return RT64_32;
   case X86::reloc_branch_4byte_pcrel:
     Modifier = MCSymbolRefExpr::VK_PLT;
@@ -203,7 +203,7 @@ static unsigned getRelocType64(MCContext &Ctx, SMLoc Loc,
     if ((unsigned)Kind == X86::reloc_riprel_4byte_movq_load_rex2 ||
         (unsigned)Kind == X86::reloc_riprel_4byte_relax_rex2)
       return ELF::R_X86_64_CODE_4_GOTTPOFF;
-    else if ((unsigned)Kind == X86::reloc_riprel_6byte_relax)
+    else if ((unsigned)Kind == X86::reloc_riprel_4byte_relax_evex)
       return ELF::R_X86_64_CODE_6_GOTTPOFF;
     return ELF::R_X86_64_GOTTPOFF;
   case MCSymbolRefExpr::VK_TLSLD:
@@ -230,8 +230,6 @@ static unsigned getRelocType64(MCContext &Ctx, SMLoc Loc,
     case X86::reloc_riprel_4byte_relax_rex2:
     case X86::reloc_riprel_4byte_movq_load_rex2:
       return ELF::R_X86_64_CODE_4_GOTPCRELX;
-    case X86::reloc_riprel_6byte_relax:
-      return ELF::R_X86_64_CODE_6_GOTTPOFF;
     }
     llvm_unreachable("unexpected relocation type!");
   case MCSymbolRefExpr::VK_GOTPCREL_NORELAX:
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h b/llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h
index 52592a5a13b978..9b951973ab1949 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h
@@ -24,8 +24,9 @@ enum Fixups {
                                              // instruction with rex prefix
   reloc_riprel_4byte_relax_rex2,             // 32-bit rip-relative in relaxable
                                              // instruction with rex2 prefix
-  reloc_riprel_6byte_relax,                  // 32-bit rip-relative in relaxable
-                                             // instruction with APX NDD
+  reloc_riprel_4byte_relax_evex,             // 32-bit rip-relative in relaxable
+                                             // instruction of APX NDD/NF with
+                                             // EVEX prefix
   reloc_signed_4byte,                        // 32-bit signed. Unlike FK_Data_4
                                              // this will be sign extended at
                                              // runtime.
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
index 052d732e4d0190..55fb9f54c53979 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -572,15 +572,15 @@ void X86MCCodeEmitter::emitImmediate(const MCOperand &DispOp, SMLoc Loc,
       FixupKind == MCFixupKind(X86::reloc_riprel_4byte_relax) ||
       FixupKind == MCFixupKind(X86::reloc_riprel_4byte_relax_rex) ||
       FixupKind == MCFixupKind(X86::reloc_riprel_4byte_relax_rex2) ||
-      FixupKind == MCFixupKind(X86::reloc_branch_4byte_pcrel)) {
+      FixupKind == MCFixupKind(X86::reloc_branch_4byte_pcrel) ||
+      FixupKind == MCFixupKind(X86::reloc_riprel_4byte_relax_evex)) {
     ImmOffset -= 4;
     // If this is a pc-relative load off _GLOBAL_OFFSET_TABLE_:
     // leaq _GLOBAL_OFFSET_TABLE_(%rip), %r15
     // this needs to be a GOTPC32 relocation.
     if (startsWithGlobalOffsetTable(Expr) != GOT_None)
       FixupKind = MCFixupKind(X86::reloc_global_offset_table);
-  } else if (FixupKind == MCFixupKind(X86::reloc_riprel_6byte_relax))
-    ImmOffset -= 6;
+  }
 
   if (FixupKind == FK_PCRel_2)
     ImmOffset -= 2;
@@ -677,7 +677,7 @@ void X86MCCodeEmitter::emitMemModRMByte(
       case X86::ADD64mr_ND:
       case X86::ADD64mr_NF_ND:
       case X86::ADD64rm_NF_ND:
-        return X86::reloc_riprel_6byte_relax;
+        return X86::reloc_riprel_4byte_relax_evex;
       }
     }();
 
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp
index 413650e90de657..69eeb09ebf2dcc 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp
@@ -70,7 +70,7 @@ static bool isFixupKindRIPRel(unsigned Kind) {
          Kind == X86::reloc_riprel_4byte_relax ||
          Kind == X86::reloc_riprel_4byte_relax_rex ||
          Kind == X86::reloc_riprel_4byte_relax_rex2 ||
-         Kind == X86::reloc_riprel_6byte_relax;
+         Kind == X86::reloc_riprel_4byte_relax_evex;
 }
 
 static unsigned getFixupKindLog2Size(unsigned Kind) {
@@ -92,7 +92,7 @@ static unsigned getFixupKindLog2Size(unsigned Kind) {
   case X86::reloc_signed_4byte:
   case X86::reloc_signed_4byte_relax:
   case X86::reloc_branch_4byte_pcrel:
-  case X86::reloc_riprel_6byte_relax:
+  case X86::reloc_riprel_4byte_relax_evex:
   case FK_Data_4: return 2;
   case FK_Data_8: return 3;
   }
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
index 48d4707bbe1ebd..f4ac242e9f1562 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
@@ -70,7 +70,7 @@ unsigned X86WinCOFFObjectWriter::getRelocType(MCContext &Ctx,
     case X86::reloc_riprel_4byte_relax:
     case X86::reloc_riprel_4byte_relax_rex:
     case X86::reloc_riprel_4byte_relax_rex2:
-    case X86::reloc_riprel_6byte_relax:
+    case X86::reloc_riprel_4byte_relax_evex:
     case X86::reloc_branch_4byte_pcrel:
       return COFF::IMAGE_REL_AMD64_REL32;
     case FK_Data_4:
diff --git a/llvm/test/MC/ELF/relocation.s b/llvm/test/MC/ELF/relocation.s
index 25497a003f8538..65a9b6f72d0aa8 100644
--- a/llvm/test/MC/ELF/relocation.s
+++ b/llvm/test/MC/ELF/relocation.s
@@ -90,11 +90,11 @@ weak_sym:
 // CHECK-NEXT:       0x2D R_X86_64_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
 // CHECK-NEXT:       0x35 R_X86_64_CODE_4_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
 // CHECK-NEXT:       0x3D R_X86_64_CODE_4_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
-// CHECK-NEXT:       0x47 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
-// CHECK-NEXT:       0x51 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
-// CHECK-NEXT:       0x5B R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
-// CHECK-NEXT:       0x65 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
-// CHECK-NEXT:       0x6F R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
+// CHECK-NEXT:       0x47 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
+// CHECK-NEXT:       0x51 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
+// CHECK-NEXT:       0x5B R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
+// CHECK-NEXT:       0x65 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
+// CHECK-NEXT:       0x6F R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
 // CHECK-NEXT:       0x76 R_X86_64_TLSGD    foo 0xFFFFFFFFFFFFFFFC
 // CHECK-NEXT:       0x7D R_X86_64_TPOFF32  foo 0x0
 // CHECK-NEXT:       0x84 R_X86_64_TLSLD    foo 0xFFFFFFFFFFFFFFFC

MaskRay

The changes look fine but someone with more experience should review

phoebewang

LGTM.

llvm-ci · 2024-12-13T03:02:35Z

LLVM Buildbot has detected a new failure on builder arc-builder running on arc-worker while building lld,llvm at step 6 "test-build-unified-tree-check-all".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/3/builds/9093

Here is the relevant piece of the build log for the reference

Step 6 (test-build-unified-tree-check-all) failure: test (failure)
******************** TEST 'lit :: googletest-timeout.py' FAILED ********************
Exit Code: 1

Command Output (stdout):
--
# RUN: at line 9
not env -u FILECHECK_OPTS "/usr/local/bin/python3.9" /buildbot/worker/arc-folder/llvm-project/llvm/utils/lit/lit.py -j1 --order=lexical -v Inputs/googletest-timeout    --param gtest_filter=InfiniteLoopSubTest --timeout=1 > /buildbot/worker/arc-folder/build/utils/lit/tests/Output/googletest-timeout.py.tmp.cmd.out
# executed command: not env -u FILECHECK_OPTS /usr/local/bin/python3.9 /buildbot/worker/arc-folder/llvm-project/llvm/utils/lit/lit.py -j1 --order=lexical -v Inputs/googletest-timeout --param gtest_filter=InfiniteLoopSubTest --timeout=1
# .---command stderr------------
# | lit.py: /buildbot/worker/arc-folder/llvm-project/llvm/utils/lit/lit/main.py:72: note: The test suite configuration requested an individual test timeout of 0 seconds but a timeout of 1 seconds was requested on the command line. Forcing timeout to be 1 seconds.
# | Traceback (most recent call last):
# |   File "/buildbot/worker/arc-folder/llvm-project/llvm/utils/lit/lit/formats/googletest.py", line 304, in post_process_shard_results
# |     testsuites = json.load(f)["testsuites"]
# |   File "/usr/local/lib/python3.9/json/__init__.py", line 293, in load
# |     return loads(fp.read(),
# |   File "/usr/local/lib/python3.9/json/__init__.py", line 346, in loads
# |     return _default_decoder.decode(s)
# |   File "/usr/local/lib/python3.9/json/decoder.py", line 337, in decode
# |     obj, end = self.raw_decode(s, idx=_w(s, 0).end())
# |   File "/usr/local/lib/python3.9/json/decoder.py", line 355, in raw_decode
# |     raise JSONDecodeError("Expecting value", s, err.value) from None
# | json.decoder.JSONDecodeError: Expecting value: line 1 column 1 (char 0)
# | 
# | During handling of the above exception, another exception occurred:
# | 
# | Traceback (most recent call last):
# |   File "/buildbot/worker/arc-folder/llvm-project/llvm/utils/lit/lit.py", line 6, in <module>
# |     main()
# |   File "/buildbot/worker/arc-folder/llvm-project/llvm/utils/lit/lit/main.py", line 130, in main
# |     selected_tests, discovered_tests = GoogleTest.post_process_shard_results(
# |   File "/buildbot/worker/arc-folder/llvm-project/llvm/utils/lit/lit/formats/googletest.py", line 306, in post_process_shard_results
# |     raise RuntimeError(
# | RuntimeError: Failed to parse json file: /buildbot/worker/arc-folder/build/utils/lit/tests/Inputs/googletest-timeout/DummySubDir/OneTest.py-googletest-timeout-1975-1-2.json
# | 
# `-----------------------------
# RUN: at line 11
FileCheck --check-prefix=CHECK-INF < /buildbot/worker/arc-folder/build/utils/lit/tests/Output/googletest-timeout.py.tmp.cmd.out /buildbot/worker/arc-folder/build/utils/lit/tests/googletest-timeout.py
# executed command: FileCheck --check-prefix=CHECK-INF /buildbot/worker/arc-folder/build/utils/lit/tests/googletest-timeout.py
# .---command stderr------------
# | /buildbot/worker/arc-folder/build/utils/lit/tests/googletest-timeout.py:34:14: error: CHECK-INF: expected string not found in input
# | # CHECK-INF: Timed Out: 1
# |              ^
# | <stdin>:13:29: note: scanning from here
# | Reached timeout of 1 seconds
# |                             ^
# | <stdin>:15:21: note: possible intended match here
# | TIMEOUT: googletest-timeout :: DummySubDir/OneTest.py/1/2 (2 of 2)
# |                     ^
# | 
# | Input file: <stdin>
...

llvmbot added lld backend:X86 mc Machine (object) code lld:ELF labels Dec 11, 2024

fzou1 requested review from MaskRay, phoebewang and KanRobert December 11, 2024 04:03

MaskRay reviewed Dec 11, 2024

View reviewed changes

KanRobert approved these changes Dec 12, 2024

View reviewed changes

phoebewang approved these changes Dec 13, 2024

View reviewed changes

MaskRay approved these changes Dec 13, 2024

View reviewed changes

fzou1 merged commit 51001f8 into llvm:main Dec 13, 2024
13 checks passed

fzou1 deleted the fix_code_6_gottpoff branch December 13, 2024 01:47

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[X86][MC] Fix offset for R_X86_64_CODE_6_GOTTPOFF fixup #119496

[X86][MC] Fix offset for R_X86_64_CODE_6_GOTTPOFF fixup #119496

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[X86][MC] Fix offset for R_X86_64_CODE_6_GOTTPOFF fixup #119496

[X86][MC] Fix offset for R_X86_64_CODE_6_GOTTPOFF fixup #119496

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