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X86: Return canonicalized result from LowerFMINIMUM_FMAXIMUM #123868

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X86: Return canonicalized result from LowerFMINIMUM_FMAXIMUM #123868

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5 changes: 3 additions & 2 deletions llvm/lib/Target/X86/X86ISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -334,10 +334,10 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
setOperationAction(ISD::FP_TO_SINT_SAT, VT, Custom);
}
setOperationAction(ISD::FCANONICALIZE, MVT::f32, Custom);
setOperationAction(ISD::FCANONICALIZE, MVT::f64, Custom);
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This is a separate change

if (Subtarget.is64Bit()) {
setOperationAction(ISD::FP_TO_UINT_SAT, MVT::i64, Custom);
setOperationAction(ISD::FP_TO_SINT_SAT, MVT::i64, Custom);
setOperationAction(ISD::FCANONICALIZE, MVT::f64, Custom);
}
}
if (Subtarget.hasAVX10_2()) {
Expand Down Expand Up @@ -29058,7 +29058,8 @@ static SDValue LowerFMINIMUM_FMAXIMUM(SDValue Op, const X86Subtarget &Subtarget,
SDValue IsNaN =
DAG.getSetCC(DL, SetCCType, NewX, NewX, IsNum ? ISD::SETO : ISD::SETUO);

return DAG.getSelect(DL, VT, IsNaN, NewX, MinMax);
MinMax = DAG.getSelect(DL, VT, IsNaN, NewX, MinMax);
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It shouldn't be required to canonicalize the result under the current rules. You would need the canonicalize handling for the strict variant, but that doesn't appear to be handled here

return DAG.getNode(ISD::FCANONICALIZE, DL, VT, MinMax);
}

static SDValue LowerABD(SDValue Op, const X86Subtarget &Subtarget,
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