Skip to content

AMDGPU: Add more tests for peephole-opt immediate folding #127480

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged

Conversation

arsenm
Copy link
Contributor

@arsenm arsenm commented Feb 17, 2025

No description provided.

@llvmbot
Copy link
Member

llvmbot commented Feb 17, 2025

@llvm/pr-subscribers-backend-amdgpu

Author: Matt Arsenault (arsenm)

Changes

Full diff: https://github.com/llvm/llvm-project/pull/127480.diff

1 Files Affected:

  • (modified) llvm/test/CodeGen/AMDGPU/peephole-fold-imm.mir (+214)
diff --git a/llvm/test/CodeGen/AMDGPU/peephole-fold-imm.mir b/llvm/test/CodeGen/AMDGPU/peephole-fold-imm.mir
index d070a8ef5dd2d..cceed6fd008e4 100644
--- a/llvm/test/CodeGen/AMDGPU/peephole-fold-imm.mir
+++ b/llvm/test/CodeGen/AMDGPU/peephole-fold-imm.mir
@@ -344,3 +344,217 @@ body:             |
     %3:vgpr_32 = V_FMA_F32_e64 0, %0, 0, %1, 0, %2.sub1, 0, 0, implicit $mode, implicit $exec
     SI_RETURN_TO_EPILOG %3
 ...
+
+---
+name:            fold_aimm_virtual
+body:             |
+  bb.0:
+
+    ; GCN-LABEL: name: fold_aimm_virtual
+    ; GCN: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 64, implicit $exec
+    ; GCN-NEXT: SI_RETURN_TO_EPILOG implicit [[V_ACCVGPR_WRITE_B32_e64_]]
+    %0:agpr_32 = V_ACCVGPR_WRITE_B32_e64 64, implicit $exec
+    %1:agpr_32 = COPY killed %0
+    SI_RETURN_TO_EPILOG implicit %1
+
+...
+
+---
+name:            fold_aimm_virtual_copy_to_vgpr
+body:             |
+  bb.0:
+
+    ; GCN-LABEL: name: fold_aimm_virtual_copy_to_vgpr
+    ; GCN: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 64, implicit $exec
+    ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 64, implicit $exec
+    ; GCN-NEXT: SI_RETURN_TO_EPILOG implicit [[V_MOV_B32_e32_]]
+    %0:agpr_32 = V_ACCVGPR_WRITE_B32_e64 64, implicit $exec
+    %1:vgpr_32 = COPY killed %0
+    SI_RETURN_TO_EPILOG implicit %1
+
+...
+
+---
+name:            fold_v_mov_b64_64_sub0_to_vgpr_32
+body:             |
+  bb.0:
+
+    ; GCN-LABEL: name: fold_v_mov_b64_64_sub0_to_vgpr_32
+    ; GCN: [[V_MOV_B64_e32_:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_e32 1311768467750121200, implicit $exec
+    ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1412567312, implicit $exec
+    ; GCN-NEXT: SI_RETURN_TO_EPILOG [[V_MOV_B32_e32_]]
+    %0:vreg_64_align2 = V_MOV_B64_e32 1311768467750121200, implicit $exec
+    %1:vgpr_32 = COPY killed %0.sub0
+    SI_RETURN_TO_EPILOG %1
+
+...
+
+---
+name:            fold_v_mov_b64_64_sub1_to_vgpr_32
+body:             |
+  bb.0:
+
+    ; GCN-LABEL: name: fold_v_mov_b64_64_sub1_to_vgpr_32
+    ; GCN: [[V_MOV_B64_e32_:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_e32 1311768467750121200, implicit $exec
+    ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 305419896, implicit $exec
+    ; GCN-NEXT: SI_RETURN_TO_EPILOG [[V_MOV_B32_e32_]]
+    %0:vreg_64_align2 = V_MOV_B64_e32 1311768467750121200, implicit $exec
+    %1:vgpr_32 = COPY killed %0.sub1
+    SI_RETURN_TO_EPILOG %1
+
+...
+
+---
+name:            fold_v_mov_b64_64
+body:             |
+  bb.0:
+
+    ; GCN-LABEL: name: fold_v_mov_b64_64
+    ; GCN: [[V_MOV_B64_e32_:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_e32 1311768467750121200, implicit $exec
+    ; GCN-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 1311768467750121200, implicit $exec
+    ; GCN-NEXT: SI_RETURN_TO_EPILOG implicit [[V_MOV_B]]
+    %0:vreg_64_align2 = V_MOV_B64_e32 1311768467750121200, implicit $exec
+    %1:vreg_64_align2 = COPY killed %0
+    SI_RETURN_TO_EPILOG implicit %1
+
+...
+
+# FIXME:
+# ---
+# name:            fold_v_mov_b64_64_to_unaligned
+# body:             |
+#   bb.0:
+#     %0:vreg_64_align2 = V_MOV_B64_e32 1311768467750121200, implicit $exec
+#     %1:vreg_64 = COPY killed %0
+#     SI_RETURN_TO_EPILOG implicit %1
+# ...
+
+# FIXME:
+# ---
+# name:            fold_v_mov_b64_pseudo_64_to_unaligned
+# body:             |
+#   bb.0:
+#     %0:vreg_64_align2 = V_MOV_B64_PSEUDO 1311768467750121200, implicit $exec
+#     %1:vreg_64 = COPY killed %0
+#     SI_RETURN_TO_EPILOG implicit %1
+# ...
+
+---
+name:            fold_s_brev_b32_simm_virtual_0
+body:             |
+  bb.0:
+
+    ; GCN-LABEL: name: fold_s_brev_b32_simm_virtual_0
+    ; GCN: [[S_BREV_B32_:%[0-9]+]]:sreg_32 = S_BREV_B32 1
+    ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY killed [[S_BREV_B32_]]
+    ; GCN-NEXT: SI_RETURN_TO_EPILOG
+    %0:sreg_32 = S_BREV_B32 1
+    %1:sreg_32 = COPY killed %0
+    SI_RETURN_TO_EPILOG
+
+...
+
+---
+name:            fold_s_brev_b32_simm_virtual_1
+body:             |
+  bb.0:
+
+    ; GCN-LABEL: name: fold_s_brev_b32_simm_virtual_1
+    ; GCN: [[S_BREV_B32_:%[0-9]+]]:sreg_32 = S_BREV_B32 -64
+    ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY killed [[S_BREV_B32_]]
+    ; GCN-NEXT: SI_RETURN_TO_EPILOG
+    %0:sreg_32 = S_BREV_B32 -64
+    %1:sreg_32 = COPY killed %0
+    SI_RETURN_TO_EPILOG
+
+...
+
+---
+name:            fold_v_bfrev_b32_e32_imm
+body:             |
+  bb.0:
+
+    ; GCN-LABEL: name: fold_v_bfrev_b32_e32_imm
+    ; GCN: [[V_BFREV_B32_e32_:%[0-9]+]]:vgpr_32 = V_BFREV_B32_e32 1, implicit $exec
+    ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY killed [[V_BFREV_B32_e32_]]
+    ; GCN-NEXT: SI_RETURN_TO_EPILOG [[COPY]]
+    %0:vgpr_32 = V_BFREV_B32_e32 1, implicit $exec
+    %1:vgpr_32 = COPY killed %0
+    SI_RETURN_TO_EPILOG %1
+
+...
+
+---
+name:            fold_v_bfrev_b32_e64_imm
+body:             |
+  bb.0:
+
+    ; GCN-LABEL: name: fold_v_bfrev_b32_e64_imm
+    ; GCN: [[V_BFREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_BFREV_B32_e64 1, implicit $exec
+    ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY killed [[V_BFREV_B32_e64_]]
+    ; GCN-NEXT: SI_RETURN_TO_EPILOG [[COPY]]
+    %0:vgpr_32 = V_BFREV_B32_e64 1, implicit $exec
+    %1:vgpr_32 = COPY killed %0
+    SI_RETURN_TO_EPILOG %1
+
+...
+
+---
+name:            fold_s_not_b32_simm_virtual_0
+body:             |
+  bb.0:
+
+    ; GCN-LABEL: name: fold_s_not_b32_simm_virtual_0
+    ; GCN: [[S_NOT_B32_:%[0-9]+]]:sreg_32 = S_NOT_B32 1, implicit-def $scc
+    ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY killed [[S_NOT_B32_]]
+    ; GCN-NEXT: SI_RETURN_TO_EPILOG
+    %0:sreg_32 = S_NOT_B32 1, implicit-def $scc
+    %1:sreg_32 = COPY killed %0
+    SI_RETURN_TO_EPILOG
+
+...
+
+---
+name:            fold_s_not_b32_simm_virtual_1
+body:             |
+  bb.0:
+
+    ; GCN-LABEL: name: fold_s_not_b32_simm_virtual_1
+    ; GCN: [[S_NOT_B32_:%[0-9]+]]:sreg_32 = S_NOT_B32 -64, implicit-def $scc
+    ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY killed [[S_NOT_B32_]]
+    ; GCN-NEXT: SI_RETURN_TO_EPILOG
+    %0:sreg_32 = S_NOT_B32 -64, implicit-def $scc
+    %1:sreg_32 = COPY killed %0
+    SI_RETURN_TO_EPILOG
+
+...
+
+---
+name:            fold_v_not_b32_e32_imm
+body:             |
+  bb.0:
+
+    ; GCN-LABEL: name: fold_v_not_b32_e32_imm
+    ; GCN: [[V_NOT_B32_e32_:%[0-9]+]]:vgpr_32 = V_NOT_B32_e32 1, implicit $exec
+    ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY killed [[V_NOT_B32_e32_]]
+    ; GCN-NEXT: SI_RETURN_TO_EPILOG [[COPY]]
+    %0:vgpr_32 = V_NOT_B32_e32 1, implicit $exec
+    %1:vgpr_32 = COPY killed %0
+    SI_RETURN_TO_EPILOG %1
+
+...
+
+---
+name:            fold_v_not_b32_e64_imm
+body:             |
+  bb.0:
+
+    ; GCN-LABEL: name: fold_v_not_b32_e64_imm
+    ; GCN: [[V_NOT_B32_e64_:%[0-9]+]]:vgpr_32 = V_NOT_B32_e64 1, implicit $exec
+    ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY killed [[V_NOT_B32_e64_]]
+    ; GCN-NEXT: SI_RETURN_TO_EPILOG [[COPY]]
+    %0:vgpr_32 = V_NOT_B32_e64 1, implicit $exec
+    %1:vgpr_32 = COPY killed %0
+    SI_RETURN_TO_EPILOG %1
+
+...

@arsenm arsenm marked this pull request as ready for review February 17, 2025 12:26
Copy link
Contributor Author

arsenm commented Feb 18, 2025

Merge activity

  • Feb 17, 10:28 PM EST: A user started a stack merge that includes this pull request via Graphite.
  • Feb 17, 10:29 PM EST: Graphite rebased this pull request as part of a merge.
  • Feb 17, 10:31 PM EST: A user merged this pull request with Graphite.

@arsenm arsenm force-pushed the users/arsenm/amdgpu-add-more-peephole-opt-imm-folding-tests branch from 26f56f8 to 2c89714 Compare February 18, 2025 03:28
@arsenm arsenm merged commit fe1ef41 into main Feb 18, 2025
5 of 8 checks passed
@arsenm arsenm deleted the users/arsenm/amdgpu-add-more-peephole-opt-imm-folding-tests branch February 18, 2025 03:31
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Projects
None yet
Development

Successfully merging this pull request may close these issues.

3 participants