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[WebAssembly] Use the same lowerings for f16x8 as other float vectors. #127897

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Merged
merged 3 commits into from
Feb 25, 2025

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brendandahl
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This fixes failures to select the various compare operations that weren't being expanded for f16x8.

This fixes failures to select the various compare operations that
weren't being expanded for f16x8.
@@ -147,11 +150,6 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering(
setTruncStoreAction(T, MVT::f16, Expand);
}

if (Subtarget->hasFP16()) {
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This is now covered above in the loop.

@llvmbot
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llvmbot commented Feb 19, 2025

@llvm/pr-subscribers-backend-webassembly

Author: Brendan Dahl (brendandahl)

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This fixes failures to select the various compare operations that weren't being expanded for f16x8.


Full diff: https://github.com/llvm/llvm-project/pull/127897.diff

2 Files Affected:

  • (modified) llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp (+4-6)
  • (modified) llvm/test/CodeGen/WebAssembly/half-precision.ll (+10)
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
index fedad25c775e2..dc3efc702ac23 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
@@ -121,7 +121,10 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering(
   setOperationAction(ISD::VACOPY, MVT::Other, Expand);
   setOperationAction(ISD::VAEND, MVT::Other, Expand);
 
-  for (auto T : {MVT::f32, MVT::f64, MVT::v4f32, MVT::v2f64}) {
+  for (auto T : {MVT::f32, MVT::f64, MVT::v4f32, MVT::v2f64, MVT::v8f16}) {
+    if (!Subtarget->hasFP16() && T == MVT::v8f16) {
+      continue;
+    }
     // Don't expand the floating-point types to constant pools.
     setOperationAction(ISD::ConstantFP, T, Legal);
     // Expand floating-point comparisons.
@@ -147,11 +150,6 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering(
     setTruncStoreAction(T, MVT::f16, Expand);
   }
 
-  if (Subtarget->hasFP16()) {
-    setOperationAction(ISD::FMINIMUM, MVT::v8f16, Legal);
-    setOperationAction(ISD::FMAXIMUM, MVT::v8f16, Legal);
-  }
-
   // Expand unavailable integer operations.
   for (auto Op :
        {ISD::BSWAP, ISD::SMUL_LOHI, ISD::UMUL_LOHI, ISD::MULHS, ISD::MULHU,
diff --git a/llvm/test/CodeGen/WebAssembly/half-precision.ll b/llvm/test/CodeGen/WebAssembly/half-precision.ll
index 5f0ba4aa9c3c4..59becd0e7e5c3 100644
--- a/llvm/test/CodeGen/WebAssembly/half-precision.ll
+++ b/llvm/test/CodeGen/WebAssembly/half-precision.ll
@@ -172,6 +172,16 @@ define <8 x i1> @compare_oge_v8f16 (<8 x half> %x, <8 x half> %y) {
   ret <8 x i1> %res
 }
 
+; CHECK-LABEL: compare_ule_v8f16:
+; CHECK-NEXT: .functype compare_ule_v8f16 (v128, v128) -> (v128){{$}}
+; CHECK-NEXT: f16x8.gt $push[[T0:[0-9]+]]=, $0, $1{{$}}
+; CHECK-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
+; CHECK-NEXT: return $pop[[R]]{{$}}
+define <8 x i1> @compare_ule_v8f16 (<8 x half> %x, <8 x half> %y) {
+  %res = fcmp ule <8 x half> %x, %y
+  ret <8 x i1> %res
+}
+
 ; CHECK-LABEL: abs_v8f16:
 ; CHECK-NEXT:  .functype abs_v8f16 (v128) -> (v128)
 ; CHECK-NEXT:  f16x8.abs $push0=, $0

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LGTM. It also looks like we are expanding FP16_TO_FP and FP_TO_FP16 operators. Do we need to fix that?

@brendandahl
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I think we still want the expansion since there isn't a legal f16 scalar type for wasm.

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tlively commented Feb 22, 2025

Even for the SIMD types?

@brendandahl
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Oh yeah, for the v8f16 we don't need to expand those. However, I'm missing the promote and truncate instructions, so these still ended up getting expanded out. I'll add those instructions in a different PR.

@brendandahl brendandahl merged commit 9102afc into llvm:main Feb 25, 2025
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3 participants