Implement areInlineCompatible for SystemZ using feature bitset #132976
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chavandres
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@llvm/pr-subscribers-backend-systemz Author: Andres Chavarria (chavandres) ChangesWhat?Implement Why?The default implementation in How?Get the FeatureBitset of the caller and callee and check when callee is a subset or equal to the caller's features. It's a similar implementation to ARM, PowerPC... Testing?Test cases check for when the callee is a subset of the caller, when it's not a subset and when both are equals. Full diff: https://github.com/llvm/llvm-project/pull/132976.diff 4 Files Affected:
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
index 06a0a3a631654..bd0fdb414bedf 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
@@ -422,6 +422,20 @@ bool SystemZTTIImpl::isLSRCostLess(const TargetTransformInfo::LSRCost &C1,
C2.ScaleCost, C2.SetupCost);
}
+bool SystemZTTIImpl::areInlineCompatible(const Function *Caller,
+ const Function *Callee) const {
+ const TargetMachine &TM = getTLI()->getTargetMachine();
+
+ const FeatureBitset &CallerBits =
+ TM.getSubtargetImpl(*Caller)->getFeatureBits();
+ const FeatureBitset &CalleeBits =
+ TM.getSubtargetImpl(*Callee)->getFeatureBits();
+
+ // Check that target features from the callee are subset or
+ // equal to the caller's features.
+ return (CalleeBits == CallerBits) || (CalleeBits < CallerBits);
+}
+
unsigned SystemZTTIImpl::getNumberOfRegisters(unsigned ClassID) const {
bool Vector = (ClassID == 1);
if (!Vector)
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
index 512fcc854d532..45de346cf97f7 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
+++ b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
@@ -62,6 +62,10 @@ class SystemZTTIImpl : public BasicTTIImplBase<SystemZTTIImpl> {
bool isLSRCostLess(const TargetTransformInfo::LSRCost &C1,
const TargetTransformInfo::LSRCost &C2);
+
+ bool areInlineCompatible(const Function *Caller,
+ const Function *Callee) const;
+
/// @}
/// \name Vector TTI Implementations
diff --git a/llvm/test/Transforms/Inline/SystemZ/inline-target-attr.ll b/llvm/test/Transforms/Inline/SystemZ/inline-target-attr.ll
new file mode 100644
index 0000000000000..1c70962dd18ee
--- /dev/null
+++ b/llvm/test/Transforms/Inline/SystemZ/inline-target-attr.ll
@@ -0,0 +1,50 @@
+; RUN: opt < %s -mtriple=s390x-linux-gnu -S -passes=inline | FileCheck %s
+; RUN: opt < %s -mtriple=s390x-linux-gnu -S -passes='cgscc(inline)' | FileCheck %s
+; Check that we only inline when we have compatible target attributes.
+
+define i32 @foo() #0 {
+entry:
+ %call = call i32 (...) @baz()
+ ret i32 %call
+; CHECK-LABEL: foo
+; CHECK: call i32 (...) @baz()
+}
+
+declare i32 @baz(...) #0
+
+define i32 @bar() #1 {
+entry:
+ %call = call i32 @foo()
+ ret i32 %call
+; CHECK-LABEL: bar
+; CHECK: call i32 (...) @baz()
+}
+
+define i32 @qux() #0 {
+entry:
+ %call = call i32 @bar()
+ ret i32 %call
+; CHECK-LABEL: qux
+; CHECK: call i32 @bar()
+}
+
+define i32 @quux() #2 {
+entry:
+ %call = call i32 @bar()
+ ret i32 %call
+; CHECK-LABEL: quux
+; CHECK: call i32 (...) @baz()
+}
+
+define i32 @foobar() #1 {
+entry:
+ %call = call i32 @bar()
+ ret i32 %call
+; CHECK-LABEL: foobar
+; CHECK: call i32 (...) @baz()
+}
+
+
+attributes #0 = { "target-cpu"="generic" "target-features"="+guarded-storage" }
+attributes #1 = { "target-cpu"="generic" "target-features"="+guarded-storage,+enhanced-sort" }
+attributes #2 = { "target-cpu"="generic" "target-features"="+concurrent-functions" }
diff --git a/llvm/test/Transforms/Inline/SystemZ/lit.local.cfg b/llvm/test/Transforms/Inline/SystemZ/lit.local.cfg
new file mode 100644
index 0000000000000..f9dd98a21cc3e
--- /dev/null
+++ b/llvm/test/Transforms/Inline/SystemZ/lit.local.cfg
@@ -0,0 +1,2 @@
+if not "SystemZ" in config.root.targets:
+ config.unsupported = True
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@llvm/pr-subscribers-llvm-transforms Author: Andres Chavarria (chavandres) ChangesWhat?Implement Why?The default implementation in How?Get the FeatureBitset of the caller and callee and check when callee is a subset or equal to the caller's features. It's a similar implementation to ARM, PowerPC... Testing?Test cases check for when the callee is a subset of the caller, when it's not a subset and when both are equals. Full diff: https://github.com/llvm/llvm-project/pull/132976.diff 4 Files Affected:
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
index 06a0a3a631654..bd0fdb414bedf 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
@@ -422,6 +422,20 @@ bool SystemZTTIImpl::isLSRCostLess(const TargetTransformInfo::LSRCost &C1,
C2.ScaleCost, C2.SetupCost);
}
+bool SystemZTTIImpl::areInlineCompatible(const Function *Caller,
+ const Function *Callee) const {
+ const TargetMachine &TM = getTLI()->getTargetMachine();
+
+ const FeatureBitset &CallerBits =
+ TM.getSubtargetImpl(*Caller)->getFeatureBits();
+ const FeatureBitset &CalleeBits =
+ TM.getSubtargetImpl(*Callee)->getFeatureBits();
+
+ // Check that target features from the callee are subset or
+ // equal to the caller's features.
+ return (CalleeBits == CallerBits) || (CalleeBits < CallerBits);
+}
+
unsigned SystemZTTIImpl::getNumberOfRegisters(unsigned ClassID) const {
bool Vector = (ClassID == 1);
if (!Vector)
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
index 512fcc854d532..45de346cf97f7 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
+++ b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
@@ -62,6 +62,10 @@ class SystemZTTIImpl : public BasicTTIImplBase<SystemZTTIImpl> {
bool isLSRCostLess(const TargetTransformInfo::LSRCost &C1,
const TargetTransformInfo::LSRCost &C2);
+
+ bool areInlineCompatible(const Function *Caller,
+ const Function *Callee) const;
+
/// @}
/// \name Vector TTI Implementations
diff --git a/llvm/test/Transforms/Inline/SystemZ/inline-target-attr.ll b/llvm/test/Transforms/Inline/SystemZ/inline-target-attr.ll
new file mode 100644
index 0000000000000..1c70962dd18ee
--- /dev/null
+++ b/llvm/test/Transforms/Inline/SystemZ/inline-target-attr.ll
@@ -0,0 +1,50 @@
+; RUN: opt < %s -mtriple=s390x-linux-gnu -S -passes=inline | FileCheck %s
+; RUN: opt < %s -mtriple=s390x-linux-gnu -S -passes='cgscc(inline)' | FileCheck %s
+; Check that we only inline when we have compatible target attributes.
+
+define i32 @foo() #0 {
+entry:
+ %call = call i32 (...) @baz()
+ ret i32 %call
+; CHECK-LABEL: foo
+; CHECK: call i32 (...) @baz()
+}
+
+declare i32 @baz(...) #0
+
+define i32 @bar() #1 {
+entry:
+ %call = call i32 @foo()
+ ret i32 %call
+; CHECK-LABEL: bar
+; CHECK: call i32 (...) @baz()
+}
+
+define i32 @qux() #0 {
+entry:
+ %call = call i32 @bar()
+ ret i32 %call
+; CHECK-LABEL: qux
+; CHECK: call i32 @bar()
+}
+
+define i32 @quux() #2 {
+entry:
+ %call = call i32 @bar()
+ ret i32 %call
+; CHECK-LABEL: quux
+; CHECK: call i32 (...) @baz()
+}
+
+define i32 @foobar() #1 {
+entry:
+ %call = call i32 @bar()
+ ret i32 %call
+; CHECK-LABEL: foobar
+; CHECK: call i32 (...) @baz()
+}
+
+
+attributes #0 = { "target-cpu"="generic" "target-features"="+guarded-storage" }
+attributes #1 = { "target-cpu"="generic" "target-features"="+guarded-storage,+enhanced-sort" }
+attributes #2 = { "target-cpu"="generic" "target-features"="+concurrent-functions" }
diff --git a/llvm/test/Transforms/Inline/SystemZ/lit.local.cfg b/llvm/test/Transforms/Inline/SystemZ/lit.local.cfg
new file mode 100644
index 0000000000000..f9dd98a21cc3e
--- /dev/null
+++ b/llvm/test/Transforms/Inline/SystemZ/lit.local.cfg
@@ -0,0 +1,2 @@
+if not "SystemZ" in config.root.targets:
+ config.unsupported = True
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||
| // Check that target features from the callee are subset or | ||
| // equal to the caller's features. | ||
| return (CalleeBits == CallerBits) || (CalleeBits < CallerBits); |
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As far as I can tell, '<' on the FeatureBitset type does not implement a subset test. To test for that, you'd need something like
CalleeBits & CallerBits == CalleeBits
However, in fact allowing any subsets is semantically incorrect. In particular, the vector feature changes the ABI, so we need to be careful here - we may need something similar to the AVX-512 tests in X86. (Or, maybe, we can at least support inlining as long as both caller and callee agree on the vector feature.)
There might be other features that could be problematic as well, I need to review in more detail.
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Got it. I agree with you on the danger of inlining without agreeing on the vector feature.
So the implementation can change to only inline when the bitset are the same, unless we add logic to agree on the vector feature assuming that is the only problematic case?
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Inlining when the bitsets are the same would certainly be correct, and we might want to do that as an interim solution. But is that actually any different from the current (default) behavior?
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In terms of behavior it will be the same as the default implementation. But given that the default uses string comparion, checking bitset equality is a cleaner solution.
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Sure. I guess that would be fine with me, thanks.
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Thank you. I updated the code and test case to only inline when both callee and caller have equal bitset.
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✅ With the latest revision this PR passed the C/C++ code formatter. |
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Can you please fix the formatting issues clang-format has complained about? Also, maybe expand the comment to say that we're currently only supporting identical feature sets, but that restriction should be relaxed in the future. Otherwise, this looks good. |
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Fixed the formatting issues, plus expanded the comment that we might support subsets in the future. I rebased the branch with the latest main and squashed my changes to single commit. |
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What?
Implement
areInlineCompatiblefor the SystemZ target using FeatureBitset comparison.Why?
The default implementation in
TargetTransformInfoImpl.hmakes a string comparison and only inlines when the target-cpu and the target-features for caller and callee are the same. We are missing out on optimizations when the callee has a subset of features of the caller.How?
Get the FeatureBitset of the caller and callee and check when callee is a subset or equal to the caller's features. It's a similar implementation to ARM, PowerPC...
Testing?
Test cases check for when the callee is a subset of the caller, when it's not a subset and when both are equals.