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[MLIR][ArmSVE] Add initial lowering of vector.contract to SVE *MMLA instructions #135636

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[MLIR][ArmSVE] Add initial lowering of vector.contract to SVE *MMLA instructions #135636

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c92b683
[MLIR][ArmSVE] Add initial lowering of `vector.contract` to SVE `*MML…
momchil-velikov Apr 8, 2025
20e2729
[fixup] Misc changes
momchil-velikov May 14, 2025
49f06d9
[fixup] Handle implicit sign-extend of LHS and RHS
momchil-velikov May 15, 2025
65feafd
[fixup] Detach integration tests
momchil-velikov May 19, 2025
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4 changes: 4 additions & 0 deletions mlir/include/mlir/Conversion/Passes.td
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Expand Up @@ -1431,6 +1431,10 @@ def ConvertVectorToLLVMPass : Pass<"convert-vector-to-llvm"> {
"bool", /*default=*/"false",
"Enables the use of ArmSVE dialect while lowering the vector "
"dialect.">,
Option<"armI8MM", "enable-arm-i8mm",
"bool", /*default=*/"false",
"Enables the use of Arm FEAT_I8MM instructions while lowering "
"the vector dialect.">,
Option<"x86Vector", "enable-x86vector",
"bool", /*default=*/"false",
"Enables the use of X86Vector dialect while lowering the vector "
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3 changes: 3 additions & 0 deletions mlir/include/mlir/Dialect/ArmSVE/Transforms/Transforms.h
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Expand Up @@ -20,6 +20,9 @@ class RewritePatternSet;
void populateArmSVELegalizeForLLVMExportPatterns(
const LLVMTypeConverter &converter, RewritePatternSet &patterns);

void populateLowerContractionToSVEI8MMPatternPatterns(
RewritePatternSet &patterns);

/// Configure the target to support lowering ArmSVE ops to ops that map to LLVM
/// intrinsics.
void configureArmSVELegalizeForExportTarget(LLVMConversionTarget &target);
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1 change: 1 addition & 0 deletions mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt
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Expand Up @@ -35,6 +35,7 @@ add_mlir_conversion_library(MLIRVectorToLLVMPass
MLIRVectorToLLVM

MLIRArmNeonDialect
MLIRArmNeonTransforms
MLIRArmSVEDialect
MLIRArmSVETransforms
MLIRAMXDialect
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7 changes: 7 additions & 0 deletions mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
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Expand Up @@ -14,6 +14,7 @@
#include "mlir/Dialect/AMX/Transforms.h"
#include "mlir/Dialect/Arith/IR/Arith.h"
#include "mlir/Dialect/ArmNeon/ArmNeonDialect.h"
#include "mlir/Dialect/ArmNeon/Transforms.h"
#include "mlir/Dialect/ArmSVE/IR/ArmSVEDialect.h"
#include "mlir/Dialect/ArmSVE/Transforms/Transforms.h"
#include "mlir/Dialect/Func/IR/FuncOps.h"
Expand Down Expand Up @@ -82,6 +83,12 @@ void ConvertVectorToLLVMPass::runOnOperation() {
populateVectorStepLoweringPatterns(patterns);
populateVectorRankReducingFMAPattern(patterns);
populateVectorGatherLoweringPatterns(patterns);
if (armI8MM) {
if (armNeon)
arm_neon::populateLowerContractionToSMMLAPatternPatterns(patterns);
if (armSVE)
populateLowerContractionToSVEI8MMPatternPatterns(patterns);
}
(void)applyPatternsGreedily(getOperation(), std::move(patterns));
}

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5 changes: 4 additions & 1 deletion mlir/lib/Dialect/ArmNeon/Transforms/LowerContractionToSMMLAPattern.cpp
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Expand Up @@ -56,6 +56,9 @@ class LowerContractionToSMMLAPattern
// Avoid 0-D vectors and 1-D rhs:
if (!lhsType.hasRank() || !rhsType.hasRank() || rhsType.getRank() < 2)
return failure();
// Avoid scalable vectors.
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Why? Could you add a note that there's a separate SVE path implement in the SVE dialect?

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Eh? This rewrite will not work with scalable vectors regardless of whether there's another rewrite or not.

Should be a separate PR, in principle, but it's hardly worth the faff.

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Let me rephrase.

The comment “Avoid scalable vectors.” explains what the code is doing, which is already clear from the code itself. What would be more helpful here is a brief note on why scalable vectors are being avoided. This may be obvious to those familiar with NEON and SVE, but adding a bit of context would make the intent clearer for others as well.

Relatedly, it might be worth mentioning that there's a separate implementation for NEON and SVE. Even within Arm, not everyone is aware that I8MM is available for both.

All I am asking for is a small addition to the comment.

if (lhsType.isScalable() || rhsType.isScalable())
return failure();
auto dimM = lhsType.getRank() == 1 ? 1 : lhsType.getDimSize(0);
auto dimN = rhsType.getDimSize(0);
auto dimK = rhsType.getDimSize(1);
Expand Down Expand Up @@ -238,5 +241,5 @@ class LowerContractionToSMMLAPattern
void mlir::arm_neon::populateLowerContractionToSMMLAPatternPatterns(
RewritePatternSet &patterns) {
MLIRContext *context = patterns.getContext();
patterns.add<LowerContractionToSMMLAPattern>(context, /*benefit=*/1);
patterns.add<LowerContractionToSMMLAPattern>(context, /*benefit=*/2);
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Why do we need this change?

}
1 change: 1 addition & 0 deletions mlir/lib/Dialect/ArmSVE/Transforms/CMakeLists.txt
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@@ -1,6 +1,7 @@
add_mlir_dialect_library(MLIRArmSVETransforms
LegalizeForLLVMExport.cpp
LegalizeVectorStorage.cpp
LowerContractionToSVEI8MMPattern.cpp

DEPENDS
MLIRArmSVEConversionsIncGen
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