Skip to content

[RISCV] Use implicit def/use of SP for PROBED_STACKALLOC*. #139153

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 3 commits into from
May 16, 2025
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
7 changes: 2 additions & 5 deletions llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -633,7 +633,6 @@ void RISCVFrameLowering::allocateAndProbeStackForRVV(

// It will be expanded to a probe loop in `inlineStackProbe`.
BuildMI(MBB, MBBI, DL, TII->get(RISCV::PROBED_STACKALLOC_RVV))
.addReg(SPReg)
.addReg(TargetReg);

if (EmitCFI) {
Expand Down Expand Up @@ -828,9 +827,7 @@ void RISCVFrameLowering::allocateStack(MachineBasicBlock &MBB,
}

// It will be expanded to a probe loop in `inlineStackProbe`.
BuildMI(MBB, MBBI, DL, TII->get(RISCV::PROBED_STACKALLOC))
.addReg(SPReg)
.addReg(TargetReg);
BuildMI(MBB, MBBI, DL, TII->get(RISCV::PROBED_STACKALLOC)).addReg(TargetReg);

if (EmitCFI) {
// Set the CFA register back to SP.
Expand Down Expand Up @@ -2433,7 +2430,7 @@ void RISCVFrameLowering::inlineStackProbe(MachineFunction &MF,
MI->getOpcode() == RISCV::PROBED_STACKALLOC_RVV) {
MachineBasicBlock::iterator MBBI = MI->getIterator();
DebugLoc DL = MBB.findDebugLoc(MBBI);
Register TargetReg = MI->getOperand(1).getReg();
Register TargetReg = MI->getOperand(0).getReg();
emitStackProbeInline(MBBI, DL, TargetReg,
(MI->getOpcode() == RISCV::PROBED_STACKALLOC_RVV));
MBBI->eraseFromParent();
Expand Down
13 changes: 7 additions & 6 deletions llvm/lib/Target/RISCV/RISCVInstrInfo.td
Original file line number Diff line number Diff line change
Expand Up @@ -1518,17 +1518,18 @@ def GIAddrRegImm :

/// Stack probing

let hasSideEffects = 1, mayLoad = 1, mayStore = 1, isCodeGenOnly = 1 in {
let hasSideEffects = 1, mayLoad = 1, mayStore = 1, isCodeGenOnly = 1,
Defs = [X2], Uses = [X2] in {
// Probed stack allocation of a constant size, used in function prologues when
// stack-clash protection is enabled.
def PROBED_STACKALLOC : Pseudo<(outs GPR:$sp),
(ins GPR:$target),
[]>,
Sched<[]>;
def PROBED_STACKALLOC_RVV : Pseudo<(outs GPR:$sp),
def PROBED_STACKALLOC : Pseudo<(outs),
(ins GPR:$target),
[]>,
Sched<[]>;
def PROBED_STACKALLOC_RVV : Pseudo<(outs),
(ins GPR:$target),
Comment on lines +1529 to +1530
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

(pedantic nit) Not sure it makes any difference, but from liveness point of view this should probably be:

Suggested change
def PROBED_STACKALLOC_RVV : Pseudo<(outs),
(ins GPR:$target),
let Constraints = "$scratch = $target" in
def PROBED_STACKALLOC_RVV : Pseudo<(outs GPR:$scratch),
(ins GPR:$target),

since RVV expansion modifies the $target register.

[]>,
Sched<[]>;
let usesCustomInserter = 1 in
def PROBED_STACKALLOC_DYN : Pseudo<(outs),
(ins GPR:$target),
Expand Down