[mlir][spirv] Add support for VectorAnyINTEL capability #68034
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| Original file line number | Diff line number | Diff line change |
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@@ -101,9 +101,11 @@ bool CompositeType::classof(Type type) { | |
| } | ||
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| bool CompositeType::isValid(VectorType type) { | ||
| // Number of elements should be between [2 - 2^32 -1], | ||
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| // since getNumElements() returns an unsigned, the upper limit check is | ||
| // unnecessary. | ||
| return type.getRank() == 1 && llvm::isa<ScalarType>(type.getElementType()) && | ||
| type.getNumElements() >= 2; | ||
| } | ||
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| Type CompositeType::getElementType(unsigned index) const { | ||
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@@ -171,9 +173,17 @@ void CompositeType::getCapabilities( | |
| .Case<VectorType>([&](VectorType type) { | ||
| auto vecSize = getNumElements(); | ||
| if (vecSize == 8 || vecSize == 16) { | ||
| static constexpr Capability caps[] = {Capability::Vector16, | ||
| Capability::VectorAnyINTEL}; | ||
| capabilities.push_back(caps); | ||
| } | ||
| // VectorAnyINTEL capability removes the vector size restriction and | ||
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There was a problem hiding this comment. Not sure I follow the logic here. We are pushing duplicated capabilities here? Shouldn't we do the check |
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| // allows the vector size to be up to (2^32-1). | ||
| // Vector16 capability allows the vector size to be 8 and 16 | ||
| SmallVector<unsigned, 5> allowedVecRange = {2, 3, 4, 8, 16}; | ||
| if (vecSize >= 2 && !llvm::is_contained(allowedVecRange, vecSize)) { | ||
| static constexpr Capability caps[] = {Capability::VectorAnyINTEL}; | ||
| capabilities.push_back(caps); | ||
| } | ||
| return llvm::cast<ScalarType>(type.getElementType()) | ||
| .getCapabilities(capabilities, storage); | ||
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| Original file line number | Diff line number | Diff line change | ||||||
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@@ -43,9 +43,13 @@ using namespace mlir; | |||||||
| template <typename LabelT> | ||||||||
| static LogicalResult checkExtensionRequirements( | ||||||||
| LabelT label, const spirv::TargetEnv &targetEnv, | ||||||||
| const spirv::SPIRVType::ExtensionArrayRefVector &candidates, | ||||||||
| const ArrayRef<spirv::Extension> elidedCandidates = {}) { | ||||||||
| for (const auto &ors : candidates) { | ||||||||
| if (targetEnv.allows(ors) || | ||||||||
| llvm::any_of(elidedCandidates, [&ors](spirv::Extension elidedExt) { | ||||||||
| return llvm::is_contained(ors, elidedExt); | ||||||||
| })) | ||||||||
| continue; | ||||||||
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| LLVM_DEBUG({ | ||||||||
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@@ -71,9 +75,13 @@ static LogicalResult checkExtensionRequirements( | |||||||
| template <typename LabelT> | ||||||||
| static LogicalResult checkCapabilityRequirements( | ||||||||
| LabelT label, const spirv::TargetEnv &targetEnv, | ||||||||
| const spirv::SPIRVType::CapabilityArrayRefVector &candidates, | ||||||||
| const ArrayRef<spirv::Capability> elidedCandidates = {}) { | ||||||||
| for (const auto &ors : candidates) { | ||||||||
| if (targetEnv.allows(ors) || | ||||||||
| llvm::any_of(elidedCandidates, [&ors](spirv::Capability elidedCap) { | ||||||||
| return llvm::is_contained(ors, elidedCap); | ||||||||
| })) | ||||||||
| continue; | ||||||||
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| LLVM_DEBUG({ | ||||||||
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@@ -90,8 +98,55 @@ static LogicalResult checkCapabilityRequirements( | |||||||
| return success(); | ||||||||
| } | ||||||||
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| /// Check capabilities and extensions requirements | ||||||||
| /// Checks that `capCandidates`, `extCandidates`, and capability | ||||||||
| /// (`capCandidates`) infered extension requirements are possible to be | ||||||||
| /// satisfied with the given `targetEnv`. | ||||||||
| /// It also provides a way to relax requirements for certain capabilities and | ||||||||
| /// extensions (e.g., `elidedCapCandidates`, `elidedExtCandidates`), this is to | ||||||||
| /// allow passes to relax certain requirements based on an option (e.g., | ||||||||
| /// relaxing bitwidth requirement, see `convertScalarType()`, | ||||||||
| /// `ConvertVectorType()`). | ||||||||
| template <typename LabelT> | ||||||||
| static LogicalResult checkCapabilityAndExtensionRequirements( | ||||||||
| LabelT label, const spirv::TargetEnv &targetEnv, | ||||||||
| const spirv::SPIRVType::CapabilityArrayRefVector &capCandidates, | ||||||||
| const spirv::SPIRVType::ExtensionArrayRefVector &extCandidates, | ||||||||
| const ArrayRef<spirv::Capability> elidedCapCandidates = {}, | ||||||||
| const ArrayRef<spirv::Extension> elidedExtCandidates = {}) { | ||||||||
|
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There was a problem hiding this comment. In mlir, we generally don't use |
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| SmallVector<ArrayRef<spirv::Extension>, 8> updatedExtCandidates; | ||||||||
| llvm::append_range(updatedExtCandidates, extCandidates); | ||||||||
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| if (failed(checkCapabilityRequirements(label, targetEnv, capCandidates, | ||||||||
| elidedCapCandidates))) | ||||||||
| return failure(); | ||||||||
| // Add capablity infered extensions to the list of extension requirement list, | ||||||||
| // only considers the capabilities that already available in the `targetEnv`. | ||||||||
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| // WARNING: Some capabilities are part of both the core SPIR-V | ||||||||
| // specification and an extension (e.g., 'Groups' capability is part of both | ||||||||
| // core specification and SPV_AMD_shader_ballot extension, hence we should | ||||||||
| // relax the capability inferred extension for these cases). | ||||||||
| static const spirv::Capability multiModalCaps[] = {spirv::Capability::Groups}; | ||||||||
| ArrayRef<spirv::Capability> multiModalCapsArrayRef(multiModalCaps, | ||||||||
| std::size(multiModalCaps)); | ||||||||
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| for (auto cap : targetEnv.getAttr().getCapabilities()) { | ||||||||
| if (llvm::any_of(multiModalCapsArrayRef, | ||||||||
| [&cap](spirv::Capability mMCap) { return cap == mMCap; })) | ||||||||
| continue; | ||||||||
| std::optional<ArrayRef<spirv::Extension>> ext = getExtensions(cap); | ||||||||
| if (ext) | ||||||||
| updatedExtCandidates.push_back(*ext); | ||||||||
| } | ||||||||
| if (failed(checkExtensionRequirements(label, targetEnv, updatedExtCandidates, | ||||||||
| elidedExtCandidates))) | ||||||||
| return failure(); | ||||||||
| return success(); | ||||||||
| } | ||||||||
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| /// Returns true if the given `storageClass` needs explicit layout when used | ||||||||
| /// in Shader environments. | ||||||||
| static bool needsExplicitLayout(spirv::StorageClass storageClass) { | ||||||||
| switch (storageClass) { | ||||||||
| case spirv::StorageClass::PhysicalStorageBuffer: | ||||||||
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@@ -230,8 +285,8 @@ convertScalarType(const spirv::TargetEnv &targetEnv, | |||||||
| type.getCapabilities(capabilities, storageClass); | ||||||||
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| // If all requirements are met, then we can accept this type as-is. | ||||||||
| if (succeeded(checkCapabilityAndExtensionRequirements( | ||||||||
| type, targetEnv, capabilities, extensions))) | ||||||||
| return type; | ||||||||
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| // Otherwise we need to adjust the type, which really means adjusting the | ||||||||
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@@ -342,15 +397,35 @@ convertVectorType(const spirv::TargetEnv &targetEnv, | |||||||
| cast<spirv::CompositeType>(type).getExtensions(extensions, storageClass); | ||||||||
| cast<spirv::CompositeType>(type).getCapabilities(capabilities, storageClass); | ||||||||
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| // If the bit-width related capabilities and extensions are not met | ||||||||
| // for lower bit-width (<32-bit), convert it to 32-bit | ||||||||
| auto elementType = | ||||||||
| convertScalarType(targetEnv, options, scalarType, storageClass); | ||||||||
| if (!elementType) | ||||||||
| return nullptr; | ||||||||
| type = VectorType::get(type.getShape(), elementType); | ||||||||
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| SmallVector<spirv::Capability, 4> elidedCaps; | ||||||||
| SmallVector<spirv::Extension, 4> elidedExts; | ||||||||
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| // Relax the bitwidth requirements for capabilities and extensions | ||||||||
| if (options.emulateLT32BitScalarTypes) { | ||||||||
| elidedCaps.push_back(spirv::Capability::Int8); | ||||||||
| elidedCaps.push_back(spirv::Capability::Int16); | ||||||||
| elidedCaps.push_back(spirv::Capability::Float16); | ||||||||
| } | ||||||||
| // For capabilities whose requirements were relaxed, relax requirements for | ||||||||
| // the extensions that were infered by those capabilities (e.g., elidedCaps) | ||||||||
| for (spirv::Capability cap : elidedCaps) { | ||||||||
| std::optional<ArrayRef<spirv::Extension>> ext = spirv::getExtensions(cap); | ||||||||
| if (ext) | ||||||||
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| llvm::append_range(elidedExts, *ext); | ||||||||
| } | ||||||||
| // If all requirements are met, then we can accept this type as-is. | ||||||||
| if (succeeded(checkCapabilityAndExtensionRequirements( | ||||||||
| type, targetEnv, capabilities, extensions, elidedCaps, elidedExts))) | ||||||||
| return type; | ||||||||
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| return nullptr; | ||||||||
| } | ||||||||
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@@ -656,8 +731,9 @@ std::optional<Value> castToSourceType(const spirv::TargetEnv &targetEnv, | |||||||
| SmallVector<ArrayRef<spirv::Capability>, 2> caps; | ||||||||
| scalarType.getExtensions(exts); | ||||||||
| scalarType.getCapabilities(caps); | ||||||||
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| if (failed(checkCapabilityAndExtensionRequirements(type, targetEnv, caps, | ||||||||
| exts))) { | ||||||||
| auto castOp = builder.create<UnrealizedConversionCastOp>(loc, type, inputs); | ||||||||
| return castOp.getResult(0); | ||||||||
| } | ||||||||
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@@ -1150,16 +1226,18 @@ bool SPIRVConversionTarget::isLegalOp(Operation *op) { | |||||||
| SmallVector<ArrayRef<spirv::Extension>, 4> typeExtensions; | ||||||||
| SmallVector<ArrayRef<spirv::Capability>, 8> typeCapabilities; | ||||||||
| for (Type valueType : valueTypes) { | ||||||||
| typeCapabilities.clear(); | ||||||||
| cast<spirv::SPIRVType>(valueType).getCapabilities(typeCapabilities); | ||||||||
| typeExtensions.clear(); | ||||||||
| cast<spirv::SPIRVType>(valueType).getExtensions(typeExtensions); | ||||||||
| // Checking for capability and extension requirements along with capability | ||||||||
| // infered extensions. | ||||||||
| // If a capability is present, the extension that | ||||||||
| // supports it should also be present, this reduces the burden of adding | ||||||||
| // extension requirement that may or maynot be added in | ||||||||
| // CompositeType::getExtensions(). | ||||||||
| if (failed(checkCapabilityAndExtensionRequirements( | ||||||||
| op->getName(), this->targetEnv, typeCapabilities, typeExtensions))) | ||||||||
| return false; | ||||||||
| } | ||||||||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
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@@ -11,9 +11,9 @@ module attributes { | |
| #spirv.vce<v1.0, [Int8, Int16, Int64, Float16, Float64, Shader], []>, #spirv.resource_limits<>> | ||
| } { | ||
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| func.func @unsupported_5elem_vector(%arg0: vector<5xi32>, %arg1: vector<5xi32>) { | ||
| // expected-error@+1 {{failed to legalize operation 'arith.subi'}} | ||
| %1 = arith.subi %arg0, %arg1: vector<5xi32> | ||
| return | ||
| } | ||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
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@@ -1407,3 +1407,43 @@ func.func @float_scalar(%arg0: f16) { | |
| } | ||
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| } // end module | ||
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| // ----- | ||
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| //===----------------------------------------------------------------------===// | ||
| // VectorAnyINTEL support | ||
| //===----------------------------------------------------------------------===// | ||
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| // Check that with VectorAnyINTEL, VectorComputeINTEL capability, | ||
| // and SPV_INTEL_vector_compute extension, any sized (2-2^32 -1) vector is allowed. | ||
| module attributes { | ||
| spirv.target_env = #spirv.target_env< | ||
| #spirv.vce<v1.0, [Int8, Int16, Int64, Float16, Float64, Kernel, VectorAnyINTEL], [SPV_INTEL_vector_compute]>, #spirv.resource_limits<>> | ||
| } { | ||
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| // CHECK-LABEL: @any_vector | ||
| func.func @any_vector(%arg0: vector<16xi32>, %arg1: vector<16xi32>) { | ||
| // CHECK: spirv.ISub %{{.+}}, %{{.+}}: vector<16xi32> | ||
| %0 = arith.subi %arg0, %arg1: vector<16xi32> | ||
| return | ||
| } | ||
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| // CHECK-LABEL: @max_vector | ||
| func.func @max_vector(%arg0: vector<4294967295xi32>, %arg1: vector<4294967295xi32>) { | ||
| // CHECK: spirv.ISub %{{.+}}, %{{.+}}: vector<4294967295xi32> | ||
| %0 = arith.subi %arg0, %arg1: vector<4294967295xi32> | ||
| return | ||
| } | ||
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| // Check float vector types of any size. | ||
| // CHECK-LABEL: @float_vector58 | ||
| func.func @float_vector58(%arg0: vector<5xf16>, %arg1: vector<8xf64>) { | ||
| // CHECK: spirv.FAdd %{{.*}}, %{{.*}}: vector<5xf16> | ||
| %0 = arith.addf %arg0, %arg0: vector<5xf16> | ||
| // CHECK: spirv.FMul %{{.*}}, %{{.*}}: vector<8xf64> | ||
| %1 = arith.mulf %arg1, %arg1: vector<8xf64> | ||
| return | ||
| } | ||
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| } // end module | ||
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This "Remove the vector size restriction." sentense does not need to be in the comment--it's the goal of this patch; but not a proper doc of
SPIRV_Vector.