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[RISCV] Implement foward inserting save/restore FRM instructions. #77744

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Merged
merged 7 commits into from
Jan 25, 2024
Merged

[RISCV] Implement foward inserting save/restore FRM instructions. #77744

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61af743
[RISCV] Implement foward inserting save/restore FRM instructions.
Jan 11, 2024
bdfe1a8
Fix typos and remove wrong comments.
Jan 16, 2024
68ddd7b
Run clnag-format.
Jan 16, 2024
da0489e
Refine code and test.
Jan 18, 2024
6bceb53
Set change right after adding implict use of frm.
Jan 18, 2024
5af6ebc
Use Register intead of std::optional<Register> for SavedFRM.
Jan 23, 2024
28cf429
Add unoptimized cases in llvm/test/CodeGen/RISCV/rvv/frm-insert.ll
Jan 25, 2024
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90 changes: 88 additions & 2 deletions llvm/lib/Target/RISCV/RISCVInsertReadWriteCSR.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -23,6 +23,11 @@ using namespace llvm;
#define DEBUG_TYPE "riscv-insert-read-write-csr"
#define RISCV_INSERT_READ_WRITE_CSR_NAME "RISC-V Insert Read/Write CSR Pass"

static cl::opt<bool>
DisableFRMInsertOpt("riscv-disable-frm-insert-opt", cl::init(false),
cl::Hidden,
cl::desc("Disable optimized frm insertion."));

namespace {

class RISCVInsertReadWriteCSR : public MachineFunctionPass {
Expand All @@ -46,6 +51,7 @@ class RISCVInsertReadWriteCSR : public MachineFunctionPass {

private:
bool emitWriteRoundingMode(MachineBasicBlock &MBB);
bool emitWriteRoundingModeOpt(MachineBasicBlock &MBB);
};

} // end anonymous namespace
Expand All @@ -55,6 +61,82 @@ char RISCVInsertReadWriteCSR::ID = 0;
INITIALIZE_PASS(RISCVInsertReadWriteCSR, DEBUG_TYPE,
RISCV_INSERT_READ_WRITE_CSR_NAME, false, false)

// TODO: Use more accurate rounding mode at the start of MBB.
bool RISCVInsertReadWriteCSR::emitWriteRoundingModeOpt(MachineBasicBlock &MBB) {
bool Changed = false;
MachineInstr *LastFRMChanger = nullptr;
unsigned CurrentRM = RISCVFPRndMode::DYN;
Register SavedFRM;

for (MachineInstr &MI : MBB) {
if (MI.getOpcode() == RISCV::SwapFRMImm ||
MI.getOpcode() == RISCV::WriteFRMImm) {
CurrentRM = MI.getOperand(0).getImm();
SavedFRM = Register();
continue;
}

if (MI.getOpcode() == RISCV::WriteFRM) {
CurrentRM = RISCVFPRndMode::DYN;
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I'm not sure here, but I think you may be confusing CurrentRM being DYN and CurrentRM being unknown. I don't know if it matters, but I think if I'm reading this right that DYN is supposed to be a "don't care" value, not an "unknown" value.

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My idea is using DYN as the right rounding mode when executing MI. And I found that I don't need std::optional for CurrentRM, since we don't have variable frm instruction.

SavedFRM = Register();
continue;
}

if (MI.isCall() || MI.isInlineAsm() || MI.readsRegister(RISCV::FRM)) {
// Restore FRM before unknown operations.
if (SavedFRM.isValid())
BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(RISCV::WriteFRM))
.addReg(SavedFRM);
CurrentRM = RISCVFPRndMode::DYN;
SavedFRM = Register();
continue;
}

assert(!MI.modifiesRegister(RISCV::FRM) &&
"Expected that MI could not modify FRM.");

int FRMIdx = RISCVII::getFRMOpNum(MI.getDesc());
if (FRMIdx < 0)
continue;
unsigned InstrRM = MI.getOperand(FRMIdx).getImm();

LastFRMChanger = &MI;

// Make MI implicit use FRM.
MI.addOperand(MachineOperand::CreateReg(RISCV::FRM, /*IsDef*/ false,
/*IsImp*/ true));
Changed = true;

// Skip if MI uses same rounding mode as FRM.
if (InstrRM == CurrentRM)
continue;

if (!SavedFRM.isValid()) {
// Save current FRM value to SavedFRM.
MachineRegisterInfo *MRI = &MBB.getParent()->getRegInfo();
SavedFRM = MRI->createVirtualRegister(&RISCV::GPRRegClass);
BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(RISCV::SwapFRMImm), SavedFRM)
.addImm(InstrRM);
} else {
// Don't need to save current FRM when SavedFRM having value.
BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(RISCV::WriteFRMImm))
.addImm(InstrRM);
}
CurrentRM = InstrRM;
}

// Restore FRM if needed.
if (SavedFRM.isValid()) {
assert(LastFRMChanger && "Expected valid pointer.");
MachineInstrBuilder MIB =
BuildMI(*MBB.getParent(), {}, TII->get(RISCV::WriteFRM))
.addReg(SavedFRM);
MBB.insertAfter(LastFRMChanger, MIB);
}

return Changed;
}

// This function also swaps frm and restores it when encountering an RVV
// floating point instruction with a static rounding mode.
bool RISCVInsertReadWriteCSR::emitWriteRoundingMode(MachineBasicBlock &MBB) {
Expand Down Expand Up @@ -99,8 +181,12 @@ bool RISCVInsertReadWriteCSR::runOnMachineFunction(MachineFunction &MF) {

bool Changed = false;

for (MachineBasicBlock &MBB : MF)
Changed |= emitWriteRoundingMode(MBB);
for (MachineBasicBlock &MBB : MF) {
if (DisableFRMInsertOpt)
Changed |= emitWriteRoundingMode(MBB);
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No test coverage for the unoptimized version.

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Do you think it is a good idea to remove the unoptimized part?

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BTW, I had added unoptimized test cases in llvm/test/CodeGen/RISCV/rvv/frm-insert.ll

else
Changed |= emitWriteRoundingModeOpt(MBB);
}

return Changed;
}
Expand Down
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