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[RISCV] Vectorize phi for loop carried @llvm.vector.reduce.fadd #78244

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Merged
merged 5 commits into from
Jan 18, 2024
Merged

[RISCV] Vectorize phi for loop carried @llvm.vector.reduce.fadd #78244

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a14e251
Add tests
lukel97 Jan 16, 2024
910dc9f
[RISCV] Vectorize phi for loop carried @llvm.vector.reduce.fadd
lukel97 Jan 16, 2024
05488f6
Remove restriction on indvar phis, erase PHI if unused, fix mangled c…
lukel97 Jan 16, 2024
f63eac7
Restrict again to just loops, restrict to cases where intrinsic is on…
lukel97 Jan 17, 2024
85b7410
Strip down tests
lukel97 Jan 17, 2024
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17 changes: 9 additions & 8 deletions llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -120,18 +120,16 @@ bool RISCVCodeGenPrepare::visitAnd(BinaryOperator &BO) {
// vectorize any scalar phis that feed into a fadd reduction:
//
// loop:
// %phi = phi <float> [ ..., %entry ], [ %acc, %loop]
// %acc = call float @llvm.vector.reduce.fadd.nxv4f32(float %phi, <vscale x 2 x
// float> %vec)
// %phi = phi <float> [ ..., %entry ], [ %acc, %loop ]
// %acc = call float @llvm.vector.reduce.fadd.nxv4f32(float %phi, <vscale x 2 x float> %vec)
//
// ->
//
// loop:
// %phi = phi <vscale x 2 x float> [ ..., %entry ], [ %acc.vec, %loop]
// %phi = phi <vscale x 2 x float> [ ..., %entry ], [ %acc.vec, %loop ]
// %phi.scalar = extractelement <vscale x 2 x float> %phi, i64 0
// %acc = call float @llvm.vector.reduce.fadd.nxv4f32(float %x, <vscale x 2 x
// float> %vec) %acc.vec = insertelement <vscale x 2 x float> poison, float
// %acc.next, i64 0
// %acc = call float @llvm.vector.reduce.fadd.nxv4f32(float %x, <vscale x 2 x float> %vec)
// %acc.vec = insertelement <vscale x 2 x float> poison, float %acc.next, i64 0
//
// Which eliminates the scalar -> vector -> scalar crossing during instruction
// selection.
Expand All @@ -140,7 +138,7 @@ bool RISCVCodeGenPrepare::visitIntrinsicInst(IntrinsicInst &I) {
return false;

auto *PHI = dyn_cast<PHINode>(I.getOperand(0));
if (!PHI || !llvm::is_contained(PHI->incoming_values(), &I))
if (!PHI)
return false;

Type *VecTy = I.getOperand(1)->getType();
Expand All @@ -157,6 +155,9 @@ bool RISCVCodeGenPrepare::visitIntrinsicInst(IntrinsicInst &I) {
Builder.SetInsertPoint(&I);
I.setOperand(0, Builder.CreateExtractElement(VecPHI, (uint64_t)0));

if (PHI->hasNUses(0))
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use_empty()?

PHI->eraseFromParent();

return true;
}

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3 changes: 1 addition & 2 deletions llvm/test/CodeGen/RISCV/rvv/riscv-codegenprepare.ll
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Expand Up @@ -26,11 +26,10 @@ define float @reduce_fadd(ptr nocapture noundef readonly %f, i32 noundef signext
; CHECK: vector.body:
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
; CHECK-NEXT: [[TMP5:%.*]] = phi <vscale x 4 x float> [ insertelement (<vscale x 4 x float> poison, float 0.000000e+00, i64 0), [[VECTOR_PH]] ], [ [[TMP10:%.*]], [[VECTOR_BODY]] ]
; CHECK-NEXT: [[VEC_PHI:%.*]] = phi float [ 0.000000e+00, [[VECTOR_PH]] ], [ [[TMP8:%.*]], [[VECTOR_BODY]] ]
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds float, ptr [[F]], i64 [[INDEX]]
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x float>, ptr [[TMP6]], align 4
; CHECK-NEXT: [[TMP7:%.*]] = extractelement <vscale x 4 x float> [[TMP5]], i64 0
; CHECK-NEXT: [[TMP8]] = tail call float @llvm.vector.reduce.fadd.nxv4f32(float [[TMP7]], <vscale x 4 x float> [[WIDE_LOAD]])
; CHECK-NEXT: [[TMP8:%.*]] = tail call float @llvm.vector.reduce.fadd.nxv4f32(float [[TMP7]], <vscale x 4 x float> [[WIDE_LOAD]])
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP4]]
; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
; CHECK-NEXT: [[TMP10]] = insertelement <vscale x 4 x float> poison, float [[TMP8]], i64 0
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