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[InstCombine] Fix assertion failure in issue80597 #80614

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Feb 5, 2024
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Original file line number Diff line number Diff line change
Expand Up @@ -802,6 +802,9 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
return InsertNewInstWith(LShr, I->getIterator());
} else if (Known.One[BitWidth-ShiftAmt-1]) { // New bits are known one.
Known.One |= HighBits;
// SignBits may be out-of-sync with Known.countMinSignBits(). Mask out
// high bits of Known.Zero to avoid conflicts.
Known.Zero &= ~HighBits;
}
} else {
computeKnownBits(I, Known, Depth, CxtI);
Expand Down
33 changes: 33 additions & 0 deletions llvm/test/Transforms/InstCombine/pr80597.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,33 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
; RUN: opt -S -passes=instcombine < %s | FileCheck %s

define i64 @pr80597(i1 %cond) {
; CHECK-LABEL: define i64 @pr80597(
; CHECK-SAME: i1 [[COND:%.*]]) {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD:%.*]] = select i1 [[COND]], i64 0, i64 -12884901888
; CHECK-NEXT: [[SEXT1:%.*]] = add nsw i64 [[ADD]], 8836839514384105472
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[SEXT1]], -34359738368
; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.else:
; CHECK-NEXT: [[SEXT2:%.*]] = ashr exact i64 [[ADD]], 1
; CHECK-NEXT: [[ASHR:%.*]] = or i64 [[SEXT2]], 4418419761487020032
; CHECK-NEXT: ret i64 [[ASHR]]
; CHECK: if.then:
; CHECK-NEXT: ret i64 0
;
entry:
%add = select i1 %cond, i64 0, i64 4294967293
%add8 = shl i64 %add, 32
%sext1 = add i64 %add8, 8836839514384105472
%cmp = icmp ult i64 %sext1, -34359738368
br i1 %cmp, label %if.then, label %if.else

if.else:
%sext2 = or i64 %add8, 8836839522974040064
%ashr = ashr i64 %sext2, 1
ret i64 %ashr

if.then:
ret i64 0
}