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[RISCV] Store RVC and TSO ELF flags explicitly in RISCVTargetStreamer. NFCI #83344

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Merged
merged 1 commit into from
Feb 29, 2024
Merged

[RISCV] Store RVC and TSO ELF flags explicitly in RISCVTargetStreamer. NFCI #83344

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8 changes: 4 additions & 4 deletions llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -31,12 +31,13 @@ using namespace llvm;
// This part is for ELF object output.
RISCVTargetELFStreamer::RISCVTargetELFStreamer(MCStreamer &S,
const MCSubtargetInfo &STI)
: RISCVTargetStreamer(S), CurrentVendor("riscv"), STI(STI) {
: RISCVTargetStreamer(S), CurrentVendor("riscv") {
MCAssembler &MCA = getStreamer().getAssembler();
const FeatureBitset &Features = STI.getFeatureBits();
auto &MAB = static_cast<RISCVAsmBackend &>(MCA.getBackend());
setTargetABI(RISCVABI::computeTargetABI(STI.getTargetTriple(), Features,
MAB.getTargetOptions().getABIName()));
setFlagsFromFeatures(STI);
// `j label` in `.option norelax; j label; .option relax; ...; label:` needs a
// relocation to ensure the jump target is correct after linking. This is due
// to a limitation that shouldForceRelocation has to make the decision upfront
Expand Down Expand Up @@ -91,10 +92,9 @@ void RISCVTargetELFStreamer::finish() {

unsigned EFlags = MCA.getELFHeaderEFlags();

if (STI.hasFeature(RISCV::FeatureStdExtC) ||
STI.hasFeature(RISCV::FeatureStdExtZca))
if (hasRVC())
EFlags |= ELF::EF_RISCV_RVC;
if (STI.hasFeature(RISCV::FeatureStdExtZtso))
if (hasTSO())
EFlags |= ELF::EF_RISCV_TSO;

switch (ABI) {
Expand Down
1 change: 0 additions & 1 deletion llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h
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Expand Up @@ -46,7 +46,6 @@ class RISCVTargetELFStreamer : public RISCVTargetStreamer {
StringRef CurrentVendor;

MCSection *AttributeSection = nullptr;
const MCSubtargetInfo &STI;

void emitAttribute(unsigned Attribute, unsigned Value) override;
void emitTextAttribute(unsigned Attribute, StringRef String) override;
Expand Down
6 changes: 6 additions & 0 deletions llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
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Expand Up @@ -48,6 +48,12 @@ void RISCVTargetStreamer::setTargetABI(RISCVABI::ABI ABI) {
TargetABI = ABI;
}

void RISCVTargetStreamer::setFlagsFromFeatures(const MCSubtargetInfo &STI) {
HasRVC = STI.hasFeature(RISCV::FeatureStdExtC) ||
STI.hasFeature(RISCV::FeatureStdExtZca);
HasTSO = STI.hasFeature(RISCV::FeatureStdExtZtso);
}

void RISCVTargetStreamer::emitTargetAttributes(const MCSubtargetInfo &STI,
bool EmitStackAlign) {
if (EmitStackAlign) {
Expand Down
5 changes: 5 additions & 0 deletions llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h
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Expand Up @@ -33,6 +33,8 @@ struct RISCVOptionArchArg {

class RISCVTargetStreamer : public MCTargetStreamer {
RISCVABI::ABI TargetABI = RISCVABI::ABI_Unknown;
bool HasRVC = false;
bool HasTSO = false;

public:
RISCVTargetStreamer(MCStreamer &S);
Expand All @@ -58,6 +60,9 @@ class RISCVTargetStreamer : public MCTargetStreamer {
void emitTargetAttributes(const MCSubtargetInfo &STI, bool EmitStackAlign);
void setTargetABI(RISCVABI::ABI ABI);
RISCVABI::ABI getTargetABI() const { return TargetABI; }
void setFlagsFromFeatures(const MCSubtargetInfo &STI);
bool hasRVC() const { return HasRVC; }
bool hasTSO() const { return HasTSO; }
};

// This part is for ascii assembly output
Expand Down