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[AMDGPU] Add GFX12 memory legalizer tests #83814

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Merged
merged 1 commit into from
Mar 4, 2024
Merged

[AMDGPU] Add GFX12 memory legalizer tests #83814

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352 changes: 352 additions & 0 deletions llvm/test/CodeGen/AMDGPU/memory-legalizer-fence.ll
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2,102 changes: 2,102 additions & 0 deletions llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
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102 changes: 102 additions & 0 deletions llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx940 -mattr=+tgsplit < %s | FileCheck -check-prefixes=GFX940-TGSPLIT %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 < %s | FileCheck --check-prefixes=GFX11-WGP %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+cumode < %s | FileCheck --check-prefixes=GFX11-CU %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 < %s | FileCheck --check-prefixes=GFX12-WGP %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=+cumode < %s | FileCheck --check-prefixes=GFX12-CU %s

define amdgpu_kernel void @flat_nontemporal_load_0(
; GFX7-LABEL: flat_nontemporal_load_0:
Expand Down Expand Up @@ -136,6 +138,28 @@ define amdgpu_kernel void @flat_nontemporal_load_0(
; GFX11-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-CU-NEXT: flat_store_b32 v[0:1], v2
; GFX11-CU-NEXT: s_endpgm
;
; GFX12-WGP-LABEL: flat_nontemporal_load_0:
; GFX12-WGP: ; %bb.0: ; %entry
; GFX12-WGP-NEXT: s_load_b128 s[0:3], s[0:1], 0x0
; GFX12-WGP-NEXT: s_wait_kmcnt 0x0
; GFX12-WGP-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX12-WGP-NEXT: flat_load_b32 v2, v[0:1] th:TH_LOAD_NT
; GFX12-WGP-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
; GFX12-WGP-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-WGP-NEXT: flat_store_b32 v[0:1], v2
; GFX12-WGP-NEXT: s_endpgm
;
; GFX12-CU-LABEL: flat_nontemporal_load_0:
; GFX12-CU: ; %bb.0: ; %entry
; GFX12-CU-NEXT: s_load_b128 s[0:3], s[0:1], 0x0
; GFX12-CU-NEXT: s_wait_kmcnt 0x0
; GFX12-CU-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX12-CU-NEXT: flat_load_b32 v2, v[0:1] th:TH_LOAD_NT
; GFX12-CU-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
; GFX12-CU-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-CU-NEXT: flat_store_b32 v[0:1], v2
; GFX12-CU-NEXT: s_endpgm
ptr %in, ptr %out) {
entry:
%val = load i32, ptr %in, align 4, !nontemporal !0
Expand Down Expand Up @@ -287,6 +311,34 @@ define amdgpu_kernel void @flat_nontemporal_load_1(
; GFX11-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-CU-NEXT: flat_store_b32 v[0:1], v2
; GFX11-CU-NEXT: s_endpgm
;
; GFX12-WGP-LABEL: flat_nontemporal_load_1:
; GFX12-WGP: ; %bb.0: ; %entry
; GFX12-WGP-NEXT: s_load_b128 s[0:3], s[0:1], 0x0
; GFX12-WGP-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; GFX12-WGP-NEXT: s_wait_kmcnt 0x0
; GFX12-WGP-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-WGP-NEXT: v_add_co_u32 v0, s0, s0, v0
; GFX12-WGP-NEXT: v_add_co_ci_u32_e64 v1, null, s1, 0, s0
; GFX12-WGP-NEXT: flat_load_b32 v2, v[0:1] th:TH_LOAD_NT
; GFX12-WGP-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
; GFX12-WGP-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-WGP-NEXT: flat_store_b32 v[0:1], v2
; GFX12-WGP-NEXT: s_endpgm
;
; GFX12-CU-LABEL: flat_nontemporal_load_1:
; GFX12-CU: ; %bb.0: ; %entry
; GFX12-CU-NEXT: s_load_b128 s[0:3], s[0:1], 0x0
; GFX12-CU-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; GFX12-CU-NEXT: s_wait_kmcnt 0x0
; GFX12-CU-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-CU-NEXT: v_add_co_u32 v0, s0, s0, v0
; GFX12-CU-NEXT: v_add_co_ci_u32_e64 v1, null, s1, 0, s0
; GFX12-CU-NEXT: flat_load_b32 v2, v[0:1] th:TH_LOAD_NT
; GFX12-CU-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
; GFX12-CU-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-CU-NEXT: flat_store_b32 v[0:1], v2
; GFX12-CU-NEXT: s_endpgm
ptr %in, ptr %out) {
entry:
%tid = call i32 @llvm.amdgcn.workitem.id.x()
Expand Down Expand Up @@ -422,6 +474,28 @@ define amdgpu_kernel void @flat_nontemporal_store_0(
; GFX11-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-CU-NEXT: flat_store_b32 v[0:1], v2 glc slc dlc
; GFX11-CU-NEXT: s_endpgm
;
; GFX12-WGP-LABEL: flat_nontemporal_store_0:
; GFX12-WGP: ; %bb.0: ; %entry
; GFX12-WGP-NEXT: s_load_b128 s[0:3], s[0:1], 0x0
; GFX12-WGP-NEXT: s_wait_kmcnt 0x0
; GFX12-WGP-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX12-WGP-NEXT: flat_load_b32 v2, v[0:1]
; GFX12-WGP-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
; GFX12-WGP-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-WGP-NEXT: flat_store_b32 v[0:1], v2 th:TH_STORE_NT
; GFX12-WGP-NEXT: s_endpgm
;
; GFX12-CU-LABEL: flat_nontemporal_store_0:
; GFX12-CU: ; %bb.0: ; %entry
; GFX12-CU-NEXT: s_load_b128 s[0:3], s[0:1], 0x0
; GFX12-CU-NEXT: s_wait_kmcnt 0x0
; GFX12-CU-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX12-CU-NEXT: flat_load_b32 v2, v[0:1]
; GFX12-CU-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
; GFX12-CU-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-CU-NEXT: flat_store_b32 v[0:1], v2 th:TH_STORE_NT
; GFX12-CU-NEXT: s_endpgm
ptr %in, ptr %out) {
entry:
%val = load i32, ptr %in, align 4
Expand Down Expand Up @@ -573,6 +647,34 @@ define amdgpu_kernel void @flat_nontemporal_store_1(
; GFX11-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-CU-NEXT: flat_store_b32 v[0:1], v2 glc slc dlc
; GFX11-CU-NEXT: s_endpgm
;
; GFX12-WGP-LABEL: flat_nontemporal_store_1:
; GFX12-WGP: ; %bb.0: ; %entry
; GFX12-WGP-NEXT: s_load_b128 s[0:3], s[0:1], 0x0
; GFX12-WGP-NEXT: s_wait_kmcnt 0x0
; GFX12-WGP-NEXT: v_dual_mov_b32 v1, s0 :: v_dual_lshlrev_b32 v0, 2, v0
; GFX12-WGP-NEXT: v_mov_b32_e32 v2, s1
; GFX12-WGP-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX12-WGP-NEXT: v_add_co_u32 v0, s0, s2, v0
; GFX12-WGP-NEXT: flat_load_b32 v2, v[1:2]
; GFX12-WGP-NEXT: v_add_co_ci_u32_e64 v1, null, s3, 0, s0
; GFX12-WGP-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-WGP-NEXT: flat_store_b32 v[0:1], v2 th:TH_STORE_NT
; GFX12-WGP-NEXT: s_endpgm
;
; GFX12-CU-LABEL: flat_nontemporal_store_1:
; GFX12-CU: ; %bb.0: ; %entry
; GFX12-CU-NEXT: s_load_b128 s[0:3], s[0:1], 0x0
; GFX12-CU-NEXT: s_wait_kmcnt 0x0
; GFX12-CU-NEXT: v_dual_mov_b32 v1, s0 :: v_dual_lshlrev_b32 v0, 2, v0
; GFX12-CU-NEXT: v_mov_b32_e32 v2, s1
; GFX12-CU-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX12-CU-NEXT: v_add_co_u32 v0, s0, s2, v0
; GFX12-CU-NEXT: flat_load_b32 v2, v[1:2]
; GFX12-CU-NEXT: v_add_co_ci_u32_e64 v1, null, s3, 0, s0
; GFX12-CU-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-CU-NEXT: flat_store_b32 v[0:1], v2 th:TH_STORE_NT
; GFX12-CU-NEXT: s_endpgm
ptr %in, ptr %out) {
entry:
%tid = call i32 @llvm.amdgcn.workitem.id.x()
Expand Down
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