[RISCV][NFC] Remove VRRegMO of tryAddHint

[wangpc-pp]

It is only used in assertion.

[llvmbot]

@llvm/pr-subscribers-backend-risc-v

Author: Wang Pengcheng (wangpc-pp)

Changes

It is only used in assertion.

---

Full diff: https://github.com/llvm/llvm-project/pull/85755.diff

1 Files Affected:

• (modified) llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp (+6-7)

diff --git a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
index a68674b221d38e..fa970b07016f1e 100644
--- a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
@@ -738,12 +738,11 @@ bool RISCVRegisterInfo::getRegAllocationHints(
   // Add any two address hints after any copy hints.
   SmallSet<Register, 4> TwoAddrHints;
 
-  auto tryAddHint = [&](const MachineOperand &VRRegMO, const MachineOperand &MO,
-                        bool NeedGPRC) -> void {
+  auto tryAddHint = [&](const MachineOperand &MO, bool NeedGPRC) -> void {
     Register Reg = MO.getReg();
     Register PhysReg = Reg.isPhysical() ? Reg : Register(VRM->getPhys(Reg));
     if (PhysReg && (!NeedGPRC || RISCV::GPRCRegClass.contains(PhysReg))) {
-      assert(!MO.getSubReg() && !VRRegMO.getSubReg() && "Unexpected subreg!");
+      assert(!MO.getSubReg() && "Unexpected subreg!");
       if (!MRI->isReserved(PhysReg) && !is_contained(Hints, PhysReg))
         TwoAddrHints.insert(PhysReg);
     }
@@ -826,16 +825,16 @@ bool RISCVRegisterInfo::getRegAllocationHints(
         if (!NeedGPRC || MI.getNumExplicitOperands() < 3 ||
             MI.getOpcode() == RISCV::ADD_UW ||
             isCompressibleOpnd(MI.getOperand(2)))
-          tryAddHint(MO, MI.getOperand(1), NeedGPRC);
+          tryAddHint(MI.getOperand(1), NeedGPRC);
         if (MI.isCommutable() && MI.getOperand(2).isReg() &&
             (!NeedGPRC || isCompressibleOpnd(MI.getOperand(1))))
-          tryAddHint(MO, MI.getOperand(2), NeedGPRC);
+          tryAddHint(MI.getOperand(2), NeedGPRC);
       } else if (OpIdx == 1 && (!NeedGPRC || MI.getNumExplicitOperands() < 3 ||
                                 isCompressibleOpnd(MI.getOperand(2)))) {
-        tryAddHint(MO, MI.getOperand(0), NeedGPRC);
+        tryAddHint(MI.getOperand(0), NeedGPRC);
       } else if (MI.isCommutable() && OpIdx == 2 &&
                  (!NeedGPRC || isCompressibleOpnd(MI.getOperand(1)))) {
-        tryAddHint(MO, MI.getOperand(0), NeedGPRC);
+        tryAddHint(MI.getOperand(0), NeedGPRC);
       }
     }
   }

[topperc]

Why is it ok to remove the assertion?

[wangpc-pp]

Why is it ok to remove the assertion?

IIUC, there will be no subregs for those opcodes and operands?
I just think it may not be a good practice to pass an argument for assertion.

[topperc]

With #85982 I am able to hit these assertions with Zdinx on RV32.