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[X86][APX] Remove KEYLOCKER and SHA promotions from EVEX MAP4. #89173

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Merged
merged 5 commits into from
Apr 19, 2024
Merged

[X86][APX] Remove KEYLOCKER and SHA promotions from EVEX MAP4. #89173

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f1bdd62
[X86][APX] Remove KEYLOCKER promotions from EVEX MAP4.
FreddyLeaf Apr 18, 2024
a11eef4
Revert "[X86][MC] Support Enc/Dec for EGPR for promoted SHA instructi…
FreddyLeaf Apr 18, 2024
abc31d6
cont. fix for SHA
FreddyLeaf Apr 18, 2024
d49676d
clang-format
FreddyLeaf Apr 18, 2024
ec540b6
address comments.
FreddyLeaf Apr 18, 2024
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15 changes: 7 additions & 8 deletions llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -5047,17 +5047,17 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
switch (IntNo) {
default: llvm_unreachable("Impossible intrinsic");
case Intrinsic::x86_encodekey128:
Opcode = GET_EGPR_IF_ENABLED(X86::ENCODEKEY128);
Opcode = X86::ENCODEKEY128;
break;
case Intrinsic::x86_encodekey256:
Opcode = GET_EGPR_IF_ENABLED(X86::ENCODEKEY256);
Opcode = X86::ENCODEKEY256;
break;
}

SDValue Chain = Node->getOperand(0);
Chain = CurDAG->getCopyToReg(Chain, dl, X86::XMM0, Node->getOperand(3),
SDValue());
if (Opcode == X86::ENCODEKEY256 || Opcode == X86::ENCODEKEY256_EVEX)
if (Opcode == X86::ENCODEKEY256)
Chain = CurDAG->getCopyToReg(Chain, dl, X86::XMM1, Node->getOperand(4),
Chain.getValue(1));

Expand Down Expand Up @@ -6476,18 +6476,17 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
default:
llvm_unreachable("Unexpected opcode!");
case X86ISD::AESENCWIDE128KL:
Opcode = GET_EGPR_IF_ENABLED(X86::AESENCWIDE128KL);
Opcode = X86::AESENCWIDE128KL;
break;
case X86ISD::AESDECWIDE128KL:
Opcode = GET_EGPR_IF_ENABLED(X86::AESDECWIDE128KL);
Opcode = X86::AESDECWIDE128KL;
break;
case X86ISD::AESENCWIDE256KL:
Opcode = GET_EGPR_IF_ENABLED(X86::AESENCWIDE256KL);
Opcode = X86::AESENCWIDE256KL;
break;
case X86ISD::AESDECWIDE256KL:
Opcode = GET_EGPR_IF_ENABLED(X86::AESDECWIDE256KL);
Opcode = X86::AESDECWIDE256KL;
break;
#undef GET_EGPR_IF_ENABLED
}

SDValue Chain = Node->getOperand(0);
Expand Down
3 changes: 0 additions & 3 deletions llvm/lib/Target/X86/X86InstrAsmAlias.td
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Original file line number Diff line number Diff line change
Expand Up @@ -899,6 +899,3 @@ def : InstAlias<"sha256rnds2\t{$src2, $dst|$dst, $src2}",
(SHA256RNDS2rr VR128:$dst, VR128:$src2), 0>;
def : InstAlias<"sha256rnds2\t{$src2, $dst|$dst, $src2}",
(SHA256RNDS2rm VR128:$dst, i128mem:$src2), 0>;

def : InstAlias<"sha256rnds2\t{$src2, $dst|$dst, $src2}",
(SHA256RNDS2rm_EVEX VR128:$dst, i128mem:$src2), 0>;
18 changes: 2 additions & 16 deletions llvm/lib/Target/X86/X86InstrKL.td
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Expand Up @@ -48,7 +48,7 @@ let SchedRW = [WriteSystem] in {
[(int_x86_loadiwkey XMM0, VR128:$src1, VR128:$src2, EAX)]>, T8, XS;
}

let Predicates = [HasKL, NoEGPR] in {
let Predicates = [HasKL] in {
let Uses = [XMM0], Defs = [XMM0, XMM1, XMM2, XMM4, XMM5, XMM6, EFLAGS] in
def ENCODEKEY128 : Encodekey<0xFA, "encodekey128">, T8;

Expand All @@ -58,17 +58,6 @@ let SchedRW = [WriteSystem] in {
let Constraints = "$src1 = $dst", Defs = [EFLAGS] in
defm "" : Aesencdec<"">, T8;
}

let Predicates = [HasKL, HasEGPR, In64BitMode] in {
let Uses = [XMM0], Defs = [XMM0, XMM1, XMM2, XMM4, XMM5, XMM6, EFLAGS] in
def ENCODEKEY128_EVEX : Encodekey<0xDA, "encodekey128">, EVEX, T_MAP4;

let Uses = [XMM0, XMM1], Defs = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, EFLAGS] in
def ENCODEKEY256_EVEX : Encodekey<0xDB, "encodekey256">, EVEX, T_MAP4;

let Constraints = "$src1 = $dst", Defs = [EFLAGS] in
defm "" : Aesencdec<"_EVEX">, EVEX, T_MAP4;
}
} // SchedRW

multiclass Aesencdecwide<string suffix> {
Expand All @@ -80,9 +69,6 @@ multiclass Aesencdecwide<string suffix> {

let SchedRW = [WriteSystem], Uses = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7],
Defs = [EFLAGS, XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7], mayLoad = 1 in {
let Predicates = [HasWIDEKL, NoEGPR] in
let Predicates = [HasWIDEKL] in
defm "" : Aesencdecwide<"">, T8;

let Predicates = [HasWIDEKL, HasEGPR, In64BitMode] in
defm "" : Aesencdecwide<"_EVEX">, EVEX, T_MAP4;
} // SchedRW
89 changes: 24 additions & 65 deletions llvm/lib/Target/X86/X86InstrSSE.td
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Original file line number Diff line number Diff line change
Expand Up @@ -6689,31 +6689,31 @@ let Predicates = [HasCRC32, HasEGPR, In64BitMode], OpMap = T_MAP4, OpEnc = EncEV

// FIXME: Is there a better scheduler class for SHA than WriteVecIMul?
multiclass SHAI_binop<bits<8> Opc, string OpcodeStr, Intrinsic IntId,
X86FoldableSchedWrite sched, string Suffix = "", bit UsesXMM0 = 0> {
def rr#Suffix : I<Opc, MRMSrcReg, (outs VR128:$dst),
(ins VR128:$src1, VR128:$src2),
!if(UsesXMM0,
!strconcat(OpcodeStr, "\t{%xmm0, $src2, $dst|$dst, $src2, xmm0}"),
!strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}")),
[!if(UsesXMM0,
(set VR128:$dst, (IntId VR128:$src1, VR128:$src2, XMM0)),
(set VR128:$dst, (IntId VR128:$src1, VR128:$src2)))]>,
T8, Sched<[sched]>;

def rm#Suffix : I<Opc, MRMSrcMem, (outs VR128:$dst),
(ins VR128:$src1, i128mem:$src2),
!if(UsesXMM0,
!strconcat(OpcodeStr, "\t{%xmm0, $src2, $dst|$dst, $src2, xmm0}"),
!strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}")),
[!if(UsesXMM0,
(set VR128:$dst, (IntId VR128:$src1,
(memop addr:$src2), XMM0)),
(set VR128:$dst, (IntId VR128:$src1,
(memop addr:$src2))))]>, T8,
Sched<[sched.Folded, sched.ReadAfterFold]>;
X86FoldableSchedWrite sched, bit UsesXMM0 = 0> {
def rr : I<Opc, MRMSrcReg, (outs VR128:$dst),
(ins VR128:$src1, VR128:$src2),
!if(UsesXMM0,
!strconcat(OpcodeStr, "\t{%xmm0, $src2, $dst|$dst, $src2, xmm0}"),
!strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}")),
[!if(UsesXMM0,
(set VR128:$dst, (IntId VR128:$src1, VR128:$src2, XMM0)),
(set VR128:$dst, (IntId VR128:$src1, VR128:$src2)))]>,
T8, Sched<[sched]>;

def rm : I<Opc, MRMSrcMem, (outs VR128:$dst),
(ins VR128:$src1, i128mem:$src2),
!if(UsesXMM0,
!strconcat(OpcodeStr, "\t{%xmm0, $src2, $dst|$dst, $src2, xmm0}"),
!strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}")),
[!if(UsesXMM0,
(set VR128:$dst, (IntId VR128:$src1,
(memop addr:$src2), XMM0)),
(set VR128:$dst, (IntId VR128:$src1,
(memop addr:$src2))))]>, T8,
Sched<[sched.Folded, sched.ReadAfterFold]>;
}

let Constraints = "$src1 = $dst", Predicates = [HasSHA, NoEGPR] in {
let Constraints = "$src1 = $dst", Predicates = [HasSHA] in {
def SHA1RNDS4rri : Ii8<0xCC, MRMSrcReg, (outs VR128:$dst),
(ins VR128:$src1, VR128:$src2, u8imm:$src3),
"sha1rnds4\t{$src3, $src2, $dst|$dst, $src2, $src3}",
Expand All @@ -6740,55 +6740,14 @@ let Constraints = "$src1 = $dst", Predicates = [HasSHA, NoEGPR] in {

let Uses=[XMM0] in
defm SHA256RNDS2 : SHAI_binop<0xCB, "sha256rnds2", int_x86_sha256rnds2,
SchedWriteVecIMul.XMM, "", 1>;
SchedWriteVecIMul.XMM, 1>;

defm SHA256MSG1 : SHAI_binop<0xCC, "sha256msg1", int_x86_sha256msg1,
SchedWriteVecIMul.XMM>;
defm SHA256MSG2 : SHAI_binop<0xCD, "sha256msg2", int_x86_sha256msg2,
SchedWriteVecIMul.XMM>;
}

let Constraints = "$src1 = $dst", Predicates = [HasSHA, HasEGPR, In64BitMode] in {
def SHA1RNDS4rri_EVEX: Ii8<0xD4, MRMSrcReg, (outs VR128:$dst),
(ins VR128:$src1, VR128:$src2, u8imm:$src3),
"sha1rnds4\t{$src3, $src2, $dst|$dst, $src2, $src3}",
[(set VR128:$dst,
(int_x86_sha1rnds4 VR128:$src1, VR128:$src2,
(i8 timm:$src3)))]>,
EVEX, NoCD8, T_MAP4, Sched<[SchedWriteVecIMul.XMM]>;
def SHA1RNDS4rmi_EVEX: Ii8<0xD4, MRMSrcMem, (outs VR128:$dst),
(ins VR128:$src1, i128mem:$src2, u8imm:$src3),
"sha1rnds4\t{$src3, $src2, $dst|$dst, $src2, $src3}",
[(set VR128:$dst,
(int_x86_sha1rnds4 VR128:$src1,
(memop addr:$src2),
(i8 timm:$src3)))]>,
EVEX, NoCD8, T_MAP4,
Sched<[SchedWriteVecIMul.XMM.Folded,
SchedWriteVecIMul.XMM.ReadAfterFold]>;

defm SHA1NEXTE : SHAI_binop<0xD8, "sha1nexte", int_x86_sha1nexte,
SchedWriteVecIMul.XMM, "_EVEX">,
EVEX, NoCD8, T_MAP4;
defm SHA1MSG1 : SHAI_binop<0xD9, "sha1msg1", int_x86_sha1msg1,
SchedWriteVecIMul.XMM, "_EVEX">,
EVEX, NoCD8, T_MAP4;
defm SHA1MSG2 : SHAI_binop<0xDA, "sha1msg2", int_x86_sha1msg2,
SchedWriteVecIMul.XMM, "_EVEX">,
EVEX, NoCD8, T_MAP4;

let Uses=[XMM0] in
defm SHA256RNDS2 : SHAI_binop<0xDB, "sha256rnds2", int_x86_sha256rnds2,
SchedWriteVecIMul.XMM, "_EVEX", 1>,
EVEX, NoCD8, T_MAP4;

defm SHA256MSG1 : SHAI_binop<0xDC, "sha256msg1", int_x86_sha256msg1,
SchedWriteVecIMul.XMM, "_EVEX">,
EVEX, NoCD8, T_MAP4;
defm SHA256MSG2 : SHAI_binop<0xDD, "sha256msg2", int_x86_sha256msg2,
SchedWriteVecIMul.XMM, "_EVEX">,
EVEX, NoCD8, T_MAP4;
}

//===----------------------------------------------------------------------===//
// AES-NI Instructions
Expand Down
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