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[RISCV][CostModel] Remove cost of icmp inst in icmp+select with SFB. #91158
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Thank you for submitting a Pull Request (PR) to the LLVM Project! This PR will be automatically labeled and the relevant teams will be If you wish to, you can add reviewers by using the "Reviewers" section on this page. If this is not working for you, it is probably because you do not have write If you have received no comments on your PR for a week, you can request a review If you have further questions, they may be answered by the LLVM GitHub User Guide. You can also ask questions in a comment on this PR, on the LLVM Discord or on the forums. |
@llvm/pr-subscribers-llvm-analysis @llvm/pr-subscribers-llvm-transforms Author: Elvis Wang (ElvisWang123) ChangesCmp and select instructinos will lower to SELECT_CC and lower to PseudoCCMOVGPR which will generate a conditional branch inst and a move inst. Remove the instruction cost of the cmp instruction because of the generated branch instruction has 0 cost in the cost model. Full diff: https://github.com/llvm/llvm-project/pull/91158.diff 3 Files Affected:
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index ce26e61880fd05..885697e48b59ad 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -1436,6 +1436,14 @@ InstructionCost RISCVTTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
}
}
+ // The cmp + select instructions will lower to SELECT_CC and lower to
+ // PseudoCCMOVGPR which will generate a conditional branch + mv. Remove
+ // the cost of the cmp instruction because the estimated cost of
+ // branch instruction is 0.
+ if (I && I->hasOneUser() && isa<SelectInst>(I->user_back()) &&
+ I->user_back()->getOperand(0) == I)
+ return 0;
+
// TODO: Add cost for scalar type.
return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind, I);
diff --git a/llvm/test/Analysis/CostModel/RISCV/cmp-select.ll b/llvm/test/Analysis/CostModel/RISCV/cmp-select.ll
new file mode 100644
index 00000000000000..6c88467afe6351
--- /dev/null
+++ b/llvm/test/Analysis/CostModel/RISCV/cmp-select.ll
@@ -0,0 +1,14 @@
+; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
+; RUN: opt < %s -mtriple=riscv64 -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output | FileCheck %s --check-prefixes=CHECK
+
+define void @cmp-select() {
+;
+; CHECK-LABEL: 'cmp-select'
+; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %cmp1 = icmp slt i64 0, 1
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %select1 = select i1 %cmp1, i32 5, i32 4
+; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+ %cmp1 = icmp slt i64 0, 1
+ %select1 = select i1 %cmp1, i32 5, i32 4
+ ret void
+}
diff --git a/llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll b/llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
index 12fdf2149daf47..af62aad84d6be3 100644
--- a/llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
+++ b/llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
@@ -699,7 +699,7 @@ define void @double_stride_ptr_iv(ptr %p, ptr %p2, i64 %stride) {
; STRIDED-NEXT: entry:
; STRIDED-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
; STRIDED-NEXT: [[TMP1:%.*]] = mul i64 [[TMP0]], 4
-; STRIDED-NEXT: [[TMP2:%.*]] = call i64 @llvm.umax.i64(i64 32, i64 [[TMP1]])
+; STRIDED-NEXT: [[TMP2:%.*]] = call i64 @llvm.umax.i64(i64 24, i64 [[TMP1]])
; STRIDED-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 1024, [[TMP2]]
; STRIDED-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]
; STRIDED: vector.memcheck:
|
@llvm/pr-subscribers-backend-risc-v Author: Elvis Wang (ElvisWang123) ChangesCmp and select instructinos will lower to SELECT_CC and lower to PseudoCCMOVGPR which will generate a conditional branch inst and a move inst. Remove the instruction cost of the cmp instruction because of the generated branch instruction has 0 cost in the cost model. Full diff: https://github.com/llvm/llvm-project/pull/91158.diff 3 Files Affected:
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index ce26e61880fd05..885697e48b59ad 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -1436,6 +1436,14 @@ InstructionCost RISCVTTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
}
}
+ // The cmp + select instructions will lower to SELECT_CC and lower to
+ // PseudoCCMOVGPR which will generate a conditional branch + mv. Remove
+ // the cost of the cmp instruction because the estimated cost of
+ // branch instruction is 0.
+ if (I && I->hasOneUser() && isa<SelectInst>(I->user_back()) &&
+ I->user_back()->getOperand(0) == I)
+ return 0;
+
// TODO: Add cost for scalar type.
return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind, I);
diff --git a/llvm/test/Analysis/CostModel/RISCV/cmp-select.ll b/llvm/test/Analysis/CostModel/RISCV/cmp-select.ll
new file mode 100644
index 00000000000000..6c88467afe6351
--- /dev/null
+++ b/llvm/test/Analysis/CostModel/RISCV/cmp-select.ll
@@ -0,0 +1,14 @@
+; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
+; RUN: opt < %s -mtriple=riscv64 -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output | FileCheck %s --check-prefixes=CHECK
+
+define void @cmp-select() {
+;
+; CHECK-LABEL: 'cmp-select'
+; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %cmp1 = icmp slt i64 0, 1
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %select1 = select i1 %cmp1, i32 5, i32 4
+; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+ %cmp1 = icmp slt i64 0, 1
+ %select1 = select i1 %cmp1, i32 5, i32 4
+ ret void
+}
diff --git a/llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll b/llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
index 12fdf2149daf47..af62aad84d6be3 100644
--- a/llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
+++ b/llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
@@ -699,7 +699,7 @@ define void @double_stride_ptr_iv(ptr %p, ptr %p2, i64 %stride) {
; STRIDED-NEXT: entry:
; STRIDED-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
; STRIDED-NEXT: [[TMP1:%.*]] = mul i64 [[TMP0]], 4
-; STRIDED-NEXT: [[TMP2:%.*]] = call i64 @llvm.umax.i64(i64 32, i64 [[TMP1]])
+; STRIDED-NEXT: [[TMP2:%.*]] = call i64 @llvm.umax.i64(i64 24, i64 [[TMP1]])
; STRIDED-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 1024, [[TMP2]]
; STRIDED-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]
; STRIDED: vector.memcheck:
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With ShortFowrardBranchOpt(SFB) or ConditionalMoveFusion, scalar ICmp and scalar Select instructinos will lower to SELECT_CC and lower to PseudoCCMOVGPR which will generate a conditional branch instr and a move instr. The cost of scalar (ICmp + Select) = (0 + Select instr cost).
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LGTM
@ElvisWang123 Congratulations on having your first Pull Request (PR) merged into the LLVM Project! Your changes will be combined with recent changes from other authors, then tested Please check whether problems have been caused by your change specifically, as How to do this, and the rest of the post-merge process, is covered in detail here. If your change does cause a problem, it may be reverted, or you can revert it yourself. If you don't get any reports, no action is required from you. Your changes are working as expected, well done! |
With ShortFowrardBranchOpt(SFB) or ConditionalMoveFusion, scalar
ICmp and scalar Select instructions will lower to SELECT_CC
and lower to PseudoCCMOVGPR which will generate a conditional
branch instruction and a move instruction.
The cost of scalar (ICmp + Select) = (0 + Select instruction cost)