[NFC][LLVM] Simplify SVE isel DAG patterns. #91510
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@llvm/pr-subscribers-backend-aarch64 Author: Paul Walker (paulwalker-arm) ChangesWe have many instances of (Ty ZPR:$op) than can be written as Ty:$Op. Whilst other operands can also be simplified this patch focuses on removing redundant instances of PPR, PNR and ZPR only. Patch is 69.43 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/91510.diff 1 Files Affected:
diff --git a/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td b/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
index 62e68de1359f7..83f24283a753b 100644
--- a/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
@@ -1269,33 +1269,33 @@ let Predicates = [HasSVE] in {
multiclass sve_masked_gather_x2_scaled<ValueType Ty, SDPatternOperator Load, string Inst> {
// base + vector of scaled offsets
- def : Pat<(Ty (Load (SVEDup0Undef), (nxv2i1 PPR:$gp), GPR64:$base, (nxv2i64 ZPR:$offs))),
+ def : Pat<(Ty (Load (SVEDup0Undef), nxv2i1:$gp, GPR64:$base, nxv2i64:$offs)),
(!cast<Instruction>(Inst # _SCALED) PPR:$gp, GPR64:$base, ZPR:$offs)>;
// base + vector of signed 32bit scaled offsets
- def : Pat<(Ty (Load (SVEDup0Undef), (nxv2i1 PPR:$gp), GPR64:$base, (sext_inreg (nxv2i64 ZPR:$offs), nxv2i32))),
+ def : Pat<(Ty (Load (SVEDup0Undef), nxv2i1:$gp, GPR64:$base, (sext_inreg nxv2i64:$offs, nxv2i32))),
(!cast<Instruction>(Inst # _SXTW_SCALED) PPR:$gp, GPR64:$base, ZPR:$offs)>;
// base + vector of unsigned 32bit scaled offsets
- def : Pat<(Ty (Load (SVEDup0Undef), (nxv2i1 PPR:$gp), GPR64:$base, (and (nxv2i64 ZPR:$offs), (nxv2i64 (splat_vector (i64 0xFFFFFFFF)))))),
+ def : Pat<(Ty (Load (SVEDup0Undef), nxv2i1:$gp, GPR64:$base, (and nxv2i64:$offs, (nxv2i64 (splat_vector (i64 0xFFFFFFFF)))))),
(!cast<Instruction>(Inst # _UXTW_SCALED) PPR:$gp, GPR64:$base, ZPR:$offs)>;
}
multiclass sve_masked_gather_x2_unscaled<ValueType Ty, SDPatternOperator Load, string Inst, Operand ImmTy> {
// vector of pointers + immediate offset (includes zero)
- def : Pat<(Ty (Load (SVEDup0Undef), (nxv2i1 PPR:$gp), (i64 ImmTy:$imm), (nxv2i64 ZPR:$ptrs))),
+ def : Pat<(Ty (Load (SVEDup0Undef), nxv2i1:$gp, (i64 ImmTy:$imm), nxv2i64:$ptrs)),
(!cast<Instruction>(Inst # _IMM) PPR:$gp, ZPR:$ptrs, ImmTy:$imm)>;
// base + vector of offsets
- def : Pat<(Ty (Load (SVEDup0Undef), (nxv2i1 PPR:$gp), GPR64:$base, (nxv2i64 ZPR:$offs))),
+ def : Pat<(Ty (Load (SVEDup0Undef), nxv2i1:$gp, GPR64:$base, nxv2i64:$offs)),
(!cast<Instruction>(Inst) PPR:$gp, GPR64:$base, ZPR:$offs)>;
// base + vector of signed 32bit offsets
- def : Pat<(Ty (Load (SVEDup0Undef), (nxv2i1 PPR:$gp), GPR64:$base, (sext_inreg (nxv2i64 ZPR:$offs), nxv2i32))),
+ def : Pat<(Ty (Load (SVEDup0Undef), nxv2i1:$gp, GPR64:$base, (sext_inreg nxv2i64:$offs, nxv2i32))),
(!cast<Instruction>(Inst # _SXTW) PPR:$gp, GPR64:$base, ZPR:$offs)>;
// base + vector of unsigned 32bit offsets
- def : Pat<(Ty (Load (SVEDup0Undef), (nxv2i1 PPR:$gp), GPR64:$base, (and (nxv2i64 ZPR:$offs), (nxv2i64 (splat_vector (i64 0xFFFFFFFF)))))),
+ def : Pat<(Ty (Load (SVEDup0Undef), nxv2i1:$gp, GPR64:$base, (and nxv2i64:$offs, (nxv2i64 (splat_vector (i64 0xFFFFFFFF)))))),
(!cast<Instruction>(Inst # _UXTW) PPR:$gp, GPR64:$base, ZPR:$offs)>;
}
multiclass sve_masked_gather_x4<ValueType Ty, SDPatternOperator Load, Instruction Inst> {
- def : Pat<(Ty (Load (SVEDup0Undef), (nxv4i1 PPR:$gp), GPR64:$base, (nxv4i32 ZPR:$offs))),
+ def : Pat<(Ty (Load (SVEDup0Undef), nxv4i1:$gp, GPR64:$base, nxv4i32:$offs)),
(Inst PPR:$gp, GPR64:$base, ZPR:$offs)>;
}
@@ -1503,33 +1503,33 @@ let Predicates = [HasSVE] in {
multiclass sve_masked_scatter_x2_scaled<ValueType Ty, SDPatternOperator Store, string Inst> {
// base + vector of scaled offsets
- def : Pat<(Store (Ty ZPR:$data), (nxv2i1 PPR:$gp), GPR64:$base, (nxv2i64 ZPR:$offs)),
+ def : Pat<(Store Ty:$data, nxv2i1:$gp, GPR64:$base, nxv2i64:$offs),
(!cast<Instruction>(Inst # _SCALED) ZPR:$data, PPR:$gp, GPR64:$base, ZPR:$offs)>;
// base + vector of signed 32bit scaled offsets
- def : Pat<(Store (Ty ZPR:$data), (nxv2i1 PPR:$gp), GPR64:$base, (sext_inreg (nxv2i64 ZPR:$offs), nxv2i32)),
+ def : Pat<(Store Ty:$data, nxv2i1:$gp, GPR64:$base, (sext_inreg nxv2i64:$offs, nxv2i32)),
(!cast<Instruction>(Inst # _SXTW_SCALED) ZPR:$data, PPR:$gp, GPR64:$base, ZPR:$offs)>;
// base + vector of unsigned 32bit scaled offsets
- def : Pat<(Store (Ty ZPR:$data), (nxv2i1 PPR:$gp), GPR64:$base, (and (nxv2i64 ZPR:$offs), (nxv2i64 (splat_vector (i64 0xFFFFFFFF))))),
+ def : Pat<(Store Ty:$data, nxv2i1:$gp, GPR64:$base, (and nxv2i64:$offs, (nxv2i64 (splat_vector (i64 0xFFFFFFFF))))),
(!cast<Instruction>(Inst # _UXTW_SCALED) ZPR:$data, PPR:$gp, GPR64:$base, ZPR:$offs)>;
}
multiclass sve_masked_scatter_x2_unscaled<ValueType Ty, SDPatternOperator Store, string Inst, Operand ImmTy> {
// vector of pointers + immediate offset (includes zero)
- def : Pat<(Store (Ty ZPR:$data), (nxv2i1 PPR:$gp), (i64 ImmTy:$imm), (nxv2i64 ZPR:$ptrs)),
+ def : Pat<(Store Ty:$data, nxv2i1:$gp, (i64 ImmTy:$imm), nxv2i64:$ptrs),
(!cast<Instruction>(Inst # _IMM) ZPR:$data, PPR:$gp, ZPR:$ptrs, ImmTy:$imm)>;
// base + vector of offsets
- def : Pat<(Store (Ty ZPR:$data), (nxv2i1 PPR:$gp), GPR64:$base, (nxv2i64 ZPR:$offs)),
+ def : Pat<(Store Ty:$data, nxv2i1:$gp, GPR64:$base, nxv2i64:$offs),
(!cast<Instruction>(Inst) ZPR:$data, PPR:$gp, GPR64:$base, ZPR:$offs)>;
// base + vector of signed 32bit offsets
- def : Pat<(Store (Ty ZPR:$data), (nxv2i1 PPR:$gp), GPR64:$base, (sext_inreg (nxv2i64 ZPR:$offs), nxv2i32)),
+ def : Pat<(Store Ty:$data, nxv2i1:$gp, GPR64:$base, (sext_inreg nxv2i64:$offs, nxv2i32)),
(!cast<Instruction>(Inst # _SXTW) ZPR:$data, PPR:$gp, GPR64:$base, ZPR:$offs)>;
// base + vector of unsigned 32bit offsets
- def : Pat<(Store (Ty ZPR:$data), (nxv2i1 PPR:$gp), GPR64:$base, (and (nxv2i64 ZPR:$offs), (nxv2i64 (splat_vector (i64 0xFFFFFFFF))))),
+ def : Pat<(Store Ty:$data, nxv2i1:$gp, GPR64:$base, (and nxv2i64:$offs, (nxv2i64 (splat_vector (i64 0xFFFFFFFF))))),
(!cast<Instruction>(Inst # _UXTW) ZPR:$data, PPR:$gp, GPR64:$base, ZPR:$offs)>;
}
multiclass sve_masked_scatter_x4<ValueType Ty, SDPatternOperator Store, Instruction Inst> {
- def : Pat<(Store (Ty ZPR:$data), (nxv4i1 PPR:$gp), GPR64:$base, (nxv4i32 ZPR:$offs)),
+ def : Pat<(Store Ty:$data, nxv4i1:$gp, GPR64:$base, nxv4i32:$offs),
(Inst ZPR:$data, PPR:$gp, GPR64:$base, ZPR:$offs)>;
}
@@ -1791,159 +1791,159 @@ let Predicates = [HasSVEorSME] in {
defm TRN2_PPP : sve_int_perm_bin_perm_pp<0b101, "trn2", AArch64trn2, int_aarch64_sve_trn2_b16, int_aarch64_sve_trn2_b32, int_aarch64_sve_trn2_b64>;
// Extract lo/hi halves of legal predicate types.
- def : Pat<(nxv1i1 (extract_subvector (nxv2i1 PPR:$Ps), (i64 0))),
+ def : Pat<(nxv1i1 (extract_subvector nxv2i1:$Ps, (i64 0))),
(PUNPKLO_PP PPR:$Ps)>;
- def : Pat<(nxv1i1 (extract_subvector (nxv2i1 PPR:$Ps), (i64 1))),
+ def : Pat<(nxv1i1 (extract_subvector nxv2i1:$Ps, (i64 1))),
(PUNPKHI_PP PPR:$Ps)>;
- def : Pat<(nxv2i1 (extract_subvector (nxv4i1 PPR:$Ps), (i64 0))),
+ def : Pat<(nxv2i1 (extract_subvector nxv4i1:$Ps, (i64 0))),
(PUNPKLO_PP PPR:$Ps)>;
- def : Pat<(nxv2i1 (extract_subvector (nxv4i1 PPR:$Ps), (i64 2))),
+ def : Pat<(nxv2i1 (extract_subvector nxv4i1:$Ps, (i64 2))),
(PUNPKHI_PP PPR:$Ps)>;
- def : Pat<(nxv4i1 (extract_subvector (nxv8i1 PPR:$Ps), (i64 0))),
+ def : Pat<(nxv4i1 (extract_subvector nxv8i1:$Ps, (i64 0))),
(PUNPKLO_PP PPR:$Ps)>;
- def : Pat<(nxv4i1 (extract_subvector (nxv8i1 PPR:$Ps), (i64 4))),
+ def : Pat<(nxv4i1 (extract_subvector nxv8i1:$Ps, (i64 4))),
(PUNPKHI_PP PPR:$Ps)>;
- def : Pat<(nxv8i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 0))),
+ def : Pat<(nxv8i1 (extract_subvector nxv16i1:$Ps, (i64 0))),
(PUNPKLO_PP PPR:$Ps)>;
- def : Pat<(nxv8i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 8))),
+ def : Pat<(nxv8i1 (extract_subvector nxv16i1:$Ps, (i64 8))),
(PUNPKHI_PP PPR:$Ps)>;
- def : Pat<(nxv1i1 (extract_subvector (nxv4i1 PPR:$Ps), (i64 0))),
+ def : Pat<(nxv1i1 (extract_subvector nxv4i1:$Ps, (i64 0))),
(PUNPKLO_PP (PUNPKLO_PP PPR:$Ps))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv4i1 PPR:$Ps), (i64 1))),
+ def : Pat<(nxv1i1 (extract_subvector nxv4i1:$Ps, (i64 1))),
(PUNPKHI_PP (PUNPKLO_PP PPR:$Ps))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv4i1 PPR:$Ps), (i64 2))),
+ def : Pat<(nxv1i1 (extract_subvector nxv4i1:$Ps, (i64 2))),
(PUNPKLO_PP (PUNPKHI_PP PPR:$Ps))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv4i1 PPR:$Ps), (i64 3))),
+ def : Pat<(nxv1i1 (extract_subvector nxv4i1:$Ps, (i64 3))),
(PUNPKHI_PP (PUNPKHI_PP PPR:$Ps))>;
- def : Pat<(nxv2i1 (extract_subvector (nxv8i1 PPR:$Ps), (i64 0))),
+ def : Pat<(nxv2i1 (extract_subvector nxv8i1:$Ps, (i64 0))),
(PUNPKLO_PP (PUNPKLO_PP PPR:$Ps))>;
- def : Pat<(nxv2i1 (extract_subvector (nxv8i1 PPR:$Ps), (i64 2))),
+ def : Pat<(nxv2i1 (extract_subvector nxv8i1:$Ps, (i64 2))),
(PUNPKHI_PP (PUNPKLO_PP PPR:$Ps))>;
- def : Pat<(nxv2i1 (extract_subvector (nxv8i1 PPR:$Ps), (i64 4))),
+ def : Pat<(nxv2i1 (extract_subvector nxv8i1:$Ps, (i64 4))),
(PUNPKLO_PP (PUNPKHI_PP PPR:$Ps))>;
- def : Pat<(nxv2i1 (extract_subvector (nxv8i1 PPR:$Ps), (i64 6))),
+ def : Pat<(nxv2i1 (extract_subvector nxv8i1:$Ps, (i64 6))),
(PUNPKHI_PP (PUNPKHI_PP PPR:$Ps))>;
- def : Pat<(nxv4i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 0))),
+ def : Pat<(nxv4i1 (extract_subvector nxv16i1:$Ps, (i64 0))),
(PUNPKLO_PP (PUNPKLO_PP PPR:$Ps))>;
- def : Pat<(nxv4i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 4))),
+ def : Pat<(nxv4i1 (extract_subvector nxv16i1:$Ps, (i64 4))),
(PUNPKHI_PP (PUNPKLO_PP PPR:$Ps))>;
- def : Pat<(nxv4i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 8))),
+ def : Pat<(nxv4i1 (extract_subvector nxv16i1:$Ps, (i64 8))),
(PUNPKLO_PP (PUNPKHI_PP PPR:$Ps))>;
- def : Pat<(nxv4i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 12))),
+ def : Pat<(nxv4i1 (extract_subvector nxv16i1:$Ps, (i64 12))),
(PUNPKHI_PP (PUNPKHI_PP PPR:$Ps))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv8i1 PPR:$Ps), (i64 0))),
+ def : Pat<(nxv1i1 (extract_subvector nxv8i1:$Ps, (i64 0))),
(PUNPKLO_PP (PUNPKLO_PP (PUNPKLO_PP PPR:$Ps)))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv8i1 PPR:$Ps), (i64 1))),
+ def : Pat<(nxv1i1 (extract_subvector nxv8i1:$Ps, (i64 1))),
(PUNPKHI_PP (PUNPKLO_PP (PUNPKLO_PP PPR:$Ps)))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv8i1 PPR:$Ps), (i64 2))),
+ def : Pat<(nxv1i1 (extract_subvector nxv8i1:$Ps, (i64 2))),
(PUNPKLO_PP (PUNPKHI_PP (PUNPKLO_PP PPR:$Ps)))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv8i1 PPR:$Ps), (i64 3))),
+ def : Pat<(nxv1i1 (extract_subvector nxv8i1:$Ps, (i64 3))),
(PUNPKHI_PP (PUNPKHI_PP (PUNPKLO_PP PPR:$Ps)))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv8i1 PPR:$Ps), (i64 4))),
+ def : Pat<(nxv1i1 (extract_subvector nxv8i1:$Ps, (i64 4))),
(PUNPKLO_PP (PUNPKLO_PP (PUNPKHI_PP PPR:$Ps)))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv8i1 PPR:$Ps), (i64 5))),
+ def : Pat<(nxv1i1 (extract_subvector nxv8i1:$Ps, (i64 5))),
(PUNPKHI_PP (PUNPKLO_PP (PUNPKHI_PP PPR:$Ps)))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv8i1 PPR:$Ps), (i64 6))),
+ def : Pat<(nxv1i1 (extract_subvector nxv8i1:$Ps, (i64 6))),
(PUNPKLO_PP (PUNPKHI_PP (PUNPKHI_PP PPR:$Ps)))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv8i1 PPR:$Ps), (i64 7))),
+ def : Pat<(nxv1i1 (extract_subvector nxv8i1:$Ps, (i64 7))),
(PUNPKHI_PP (PUNPKHI_PP (PUNPKHI_PP PPR:$Ps)))>;
- def : Pat<(nxv2i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 0))),
+ def : Pat<(nxv2i1 (extract_subvector nxv16i1:$Ps, (i64 0))),
(PUNPKLO_PP (PUNPKLO_PP (PUNPKLO_PP PPR:$Ps)))>;
- def : Pat<(nxv2i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 2))),
+ def : Pat<(nxv2i1 (extract_subvector nxv16i1:$Ps, (i64 2))),
(PUNPKHI_PP (PUNPKLO_PP (PUNPKLO_PP PPR:$Ps)))>;
- def : Pat<(nxv2i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 4))),
+ def : Pat<(nxv2i1 (extract_subvector nxv16i1:$Ps, (i64 4))),
(PUNPKLO_PP (PUNPKHI_PP (PUNPKLO_PP PPR:$Ps)))>;
- def : Pat<(nxv2i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 6))),
+ def : Pat<(nxv2i1 (extract_subvector nxv16i1:$Ps, (i64 6))),
(PUNPKHI_PP (PUNPKHI_PP (PUNPKLO_PP PPR:$Ps)))>;
- def : Pat<(nxv2i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 8))),
+ def : Pat<(nxv2i1 (extract_subvector nxv16i1:$Ps, (i64 8))),
(PUNPKLO_PP (PUNPKLO_PP (PUNPKHI_PP PPR:$Ps)))>;
- def : Pat<(nxv2i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 10))),
+ def : Pat<(nxv2i1 (extract_subvector nxv16i1:$Ps, (i64 10))),
(PUNPKHI_PP (PUNPKLO_PP (PUNPKHI_PP PPR:$Ps)))>;
- def : Pat<(nxv2i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 12))),
+ def : Pat<(nxv2i1 (extract_subvector nxv16i1:$Ps, (i64 12))),
(PUNPKLO_PP (PUNPKHI_PP (PUNPKHI_PP PPR:$Ps)))>;
- def : Pat<(nxv2i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 14))),
+ def : Pat<(nxv2i1 (extract_subvector nxv16i1:$Ps, (i64 14))),
(PUNPKHI_PP (PUNPKHI_PP (PUNPKHI_PP PPR:$Ps)))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 0))),
+ def : Pat<(nxv1i1 (extract_subvector nxv16i1:$Ps, (i64 0))),
(PUNPKLO_PP (PUNPKLO_PP (PUNPKLO_PP (PUNPKLO_PP PPR:$Ps))))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 1))),
+ def : Pat<(nxv1i1 (extract_subvector nxv16i1:$Ps, (i64 1))),
(PUNPKHI_PP (PUNPKLO_PP (PUNPKLO_PP (PUNPKLO_PP PPR:$Ps))))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 2))),
+ def : Pat<(nxv1i1 (extract_subvector nxv16i1:$Ps, (i64 2))),
(PUNPKLO_PP (PUNPKHI_PP (PUNPKLO_PP (PUNPKLO_PP PPR:$Ps))))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 3))),
+ def : Pat<(nxv1i1 (extract_subvector nxv16i1:$Ps, (i64 3))),
(PUNPKHI_PP (PUNPKHI_PP (PUNPKLO_PP (PUNPKLO_PP PPR:$Ps))))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 4))),
+ def : Pat<(nxv1i1 (extract_subvector nxv16i1:$Ps, (i64 4))),
(PUNPKLO_PP (PUNPKLO_PP (PUNPKHI_PP (PUNPKLO_PP PPR:$Ps))))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 5))),
+ def : Pat<(nxv1i1 (extract_subvector nxv16i1:$Ps, (i64 5))),
(PUNPKHI_PP (PUNPKLO_PP (PUNPKHI_PP (PUNPKLO_PP PPR:$Ps))))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 6))),
+ def : Pat<(nxv1i1 (extract_subvector nxv16i1:$Ps, (i64 6))),
(PUNPKLO_PP (PUNPKHI_PP (PUNPKHI_PP (PUNPKLO_PP PPR:$Ps))))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 7))),
+ def : Pat<(nxv1i1 (extract_subvector nxv16i1:$Ps, (i64 7))),
(PUNPKHI_PP (PUNPKHI_PP (PUNPKHI_PP (PUNPKLO_PP PPR:$Ps))))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 8))),
+ def : Pat<(nxv1i1 (extract_subvector nxv16i1:$Ps, (i64 8))),
(PUNPKLO_PP (PUNPKLO_PP (PUNPKLO_PP (PUNPKHI_PP PPR:$Ps))))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 9))),
+ def : Pat<(nxv1i1 (extract_subvector nxv16i1:$Ps, (i64 9))),
(PUNPKHI_PP (PUNPKLO_PP (PUNPKLO_PP (PUNPKHI_PP PPR:$Ps))))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 10))),
+ def : Pat<(nxv1i1 (extract_subvector nxv16i1:$Ps, (i64 10))),
(PUNPKLO_PP (PUNPKHI_PP (PUNPKLO_PP (PUNPKHI_PP PPR:$Ps))))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 11))),
+ def : Pat<(nxv1i1 (extract_subvector nxv16i1:$Ps, (i64 11))),
(PUNPKHI_PP (PUNPKHI_PP (PUNPKLO_PP (PUNPKHI_PP PPR:$Ps))))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 12))),
+ def : Pat<(nxv1i1 (extract_subvector nxv16i1:$Ps, (i64 12))),
(PUNPKLO_PP (PUNPKLO_PP (PUNPKHI_PP (PUNPKHI_PP PPR:$Ps))))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 13))),
+ def : Pat<(nxv1i1 (extract_subvector nxv16i1:$Ps, (i64 13))),
(PUNPKHI_PP (PUNPKLO_PP (PUNPKHI_PP (PUNPKHI_PP PPR:$Ps))))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 14))),
+ def : Pat<(nxv1i1 (extract_subvector nxv16i1:$Ps, (i64 14))),
(PUNPKLO_PP (PUNPKHI_PP (PUNPKHI_PP (PUNPKHI_PP PPR:$Ps))))>;
- def : Pat<(nxv1i1 (extract_subvector (nxv16i1 PPR:$Ps), (i64 15))),
+ def : Pat<(nxv1i1 (extract_subvector nxv16i1:$Ps, (i64 15))),
(PUNPKHI_PP (PUNPKHI_PP (PUNPKHI_PP (PUNPKHI_PP PPR:$Ps))))>;
// Extract subvectors from FP SVE vectors
- def : Pat<(nxv2f16 (extract_subvector (nxv4f16 ZPR:$Zs), (i64 0))),
+ def : Pat<(nxv2f16 (extract_subvector nxv4f16:$Zs, (i64 0))),
(UUNPKLO_ZZ_D ZPR:$Zs)>;
- def : Pat<(nxv2f16 (extract_subvector (nxv4f16 ZPR:$Zs), (i64 2))),
+ def : Pat<(nxv2f16 (extract_subvector nxv4f16:$Zs, (i64 2))),
(UUNPKHI_ZZ_D ZPR:$Zs)>;
- def : Pat<(nxv4f16 (extract_subvector (nxv8f16 ZPR:$Zs), (i64 0))),
+ def : Pat<(nxv4f16 (extract_subvector nxv8f16:$Zs, (i64 0))),
(UUNPKLO_ZZ_S ZPR:$Zs)>;
- def : Pat<(nxv4f16 (extract_subvector (nxv8f16 ZPR:$Zs), (i64 4))),
+ def : Pat<(nxv4f16 (extract_subvector nxv8f16:$Zs, (i64 4))),
(UUNPKHI_ZZ_S ZPR:$Zs)>;
- def : Pat<(nxv2f32 (extract_subvector (nxv4f32 ZPR:$Zs), (i64 0))),
+ def : Pat<(nxv2f32 (extract_subvector nxv4f32:$Zs, (i64 0))),
(UUNPKLO_ZZ_D ZPR:$Zs)>;
- def : Pat<(nxv2f32 (extract_subvector (nxv4f32 ZPR:$Zs), (i64 2))),
+ def : Pat<(nxv2f32 (extract_subvector nxv4f32:$Zs, (i64 2))),
(UUNPKHI_ZZ_D ZPR:$Zs)>;
- def : Pat<(nxv2bf16 (extract_subvector (nxv4bf16 ZPR:$Zs), (i64 0))),
+ def : Pat<(nxv2bf16 (extract_subvector nxv4bf16:$Zs, (i64 0))),
(UUNPKLO_ZZ_D ZPR:$Zs)>;
- def : Pat<(nxv2bf16 (extract_subvector (nxv4bf16 ZPR:$Zs), (i64 2))),
+ def : Pat<(nxv2bf16 (extract_subvector nxv4bf16:$Zs, (i64 2))),
(UUNPKHI_ZZ_D ZPR:$Zs)>;
- def : Pat<(nxv4bf16 (extract_subvector (nxv8bf16 ZPR:$Zs), (i64 0))),
+ def : Pat<(nxv4bf16 (extract_subvector nxv8bf16:$Zs, (i64 0))),
(UUNPKLO_ZZ_S ZPR:$Zs)>;
- def : Pat<(nxv4bf16 (extract_subvector (nxv8bf16 ZPR:$Zs), (i64 4))),
+ def : Pat<(nxv4bf16 (extract_subvector nxv8bf16:$Zs, (i64 4))),
(UUNPKHI_ZZ_S ZPR:$Zs)>;
- def : Pat<(nxv2f16 (extract_subvector (nxv8f16 ZPR:$Zs), (i64 0))),
+ def : Pat<(nxv2f16 (extract_subvector nxv8f16:$Zs, (i64 0))),
(UUNPKLO_ZZ_D (UUNPKLO_ZZ_S ZPR:$Zs))>;
- def : Pat<(nxv2f16 (extract_subvector (nxv8f16 ZPR:$Zs), (i64 2))),
+ def : Pat<(nxv2f16 (extract_subvector nxv8f16:$Zs, (i64 2))),
(UUNPKHI_ZZ_D (UUNPKLO_ZZ_S ZPR:$Zs))>;
- def : Pat<(nxv2f16 (extract_subvector (nxv8f16 ZPR:$Zs), (i64 4))),
+ def : Pat<(nxv2f16 (extract_subvector nxv8f16:$Zs, (i64 4))),
(UUNPKLO_ZZ_D (UUNPKHI_ZZ_S ZPR:$Zs))>;
- def : Pat<(nxv2f16 (extract_subvector (nxv8f16 ZPR:$Zs), (i64 6))),
+ def : Pat<(nxv2f16 (extract_subvector nxv8f16:$Zs, (i64 6))),
(UUNPKHI_ZZ_D (UUNPKHI_ZZ_S ZPR:$Zs))>;
- def : Pat<(nxv2bf16 (extract_subvector (nxv8bf16 ZPR:$Zs), (i64 0))),
+ def : Pat<(nxv2bf16 (extract_subvector nxv8bf16:$Zs, (i64 0))),
(UUNPKLO_ZZ_D (UUNPKLO_ZZ_S ZPR:$Zs))>;
- def : Pat<(nxv2bf16 (extract_subvector (nxv8bf16 ZPR:$Zs), (i64 2))),
+ def : Pat<(nxv2bf16 (extract_subvector nxv8bf16:$Zs, (i64 2))),
(UUNPKHI_ZZ_D (UUNPKLO_ZZ_S ZPR:$Zs))>;
- def : Pat<(nxv2bf16 (extract_subvector (nxv8bf16 ZPR:$Zs), (i64 4))),
+ def : Pat<(nxv2bf16 (extract_subvector nxv8bf16:$Zs, (i64 4))),
(UUNPKLO_ZZ_D (UUNPKHI_ZZ_S ZPR:$Zs))>;
- def : Pat<(nxv2bf16 (extract_subvector (nxv8bf16 ZPR:$Zs), (i64 6))),
+ def : Pat<(nxv2bf16 (extract_subvector nxv8bf16:$Zs, (i64 6))),
(UUNPKHI_ZZ_D (UUNPKHI_ZZ_S ZPR:$Zs))>;
// extract/insert 64-bit fixed length vector from/into a scalable vector
foreach VT = [v8i8, v4i16, v2i32, v1i64, v4f16, v2f32, v1f64, v4bf16] in {
- def : Pat<(VT (vector_extract_subvec (SVEContainerVT<VT>.Value ZPR:$Zs), (i64 0))),
+ def : Pat<(VT (vector_extract_subvec SVEContainerVT<VT>.Value:$Zs, (i64 0))),
(EXTRACT_SUBREG ZPR:$Zs, dsub)>;
def : Pat<(SVEContainerVT<VT>.Value (vector_insert_su...
[truncated]
|
paulwalker-arm
requested review from
huntergr-arm,
sdesmalen-arm and
kmclaughlin-arm
kmclaughlin-arm
approved these changes
May 9, 2024
We have many instances of (Ty ZPR:$op) than can be written as Ty:$Op. Whilst other operands can also be simplified this patch focuses on removing redundant instances of PPR, PNR and ZPR.
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We have many instances of (Ty ZPR:$op) than can be written as Ty:$Op. Whilst other operands can also be simplified this patch focuses on removing redundant instances of PPR, PNR and ZPR only.