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[X86] Add AMXProgModel to YAML serialization #94988

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Merged
merged 1 commit into from
Jun 11, 2024
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[X86] Add AMXProgModel to YAML serialization #94988

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13 changes: 13 additions & 0 deletions llvm/lib/Target/X86/X86MachineFunctionInfo.cpp
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Expand Up @@ -13,13 +13,26 @@

using namespace llvm;

yaml::X86MachineFunctionInfo::X86MachineFunctionInfo(
const llvm::X86MachineFunctionInfo &MFI)
: AMXProgModel(MFI.getAMXProgModel()) {}

void yaml::X86MachineFunctionInfo::mappingImpl(yaml::IO &YamlIO) {
MappingTraits<X86MachineFunctionInfo>::mapping(YamlIO, *this);
}

MachineFunctionInfo *X86MachineFunctionInfo::clone(
BumpPtrAllocator &Allocator, MachineFunction &DestMF,
const DenseMap<MachineBasicBlock *, MachineBasicBlock *> &Src2DstMBB)
const {
return DestMF.cloneInfo<X86MachineFunctionInfo>(*this);
}

void X86MachineFunctionInfo::initializeBaseYamlFields(
const yaml::X86MachineFunctionInfo &YamlMFI) {
AMXProgModel = YamlMFI.AMXProgModel;
}

void X86MachineFunctionInfo::anchor() { }

void X86MachineFunctionInfo::setRestoreBasePointer(const MachineFunction *MF) {
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32 changes: 32 additions & 0 deletions llvm/lib/Target/X86/X86MachineFunctionInfo.h
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Expand Up @@ -16,13 +16,43 @@
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/CallingConvLower.h"
#include "llvm/CodeGen/MIRYamlMapping.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/Support/YAMLTraits.h"
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Is it possible to do this without pulling in YAML infrastructure in X86 headers? For example by keeping all the YAML stuff inside X86TargetMachine.cpp?

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Think again, if just for MIR tests, we may only need to initialize AMXProgModel to ManagedRA and reset to AMXProgModelEnum::None in beginning of X86ISelDAGToDAG.cpp.

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@aengelke aengelke Jun 11, 2024 •
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Another solution would be to scan the MIR for virtual tile reg definitions when loading from a file. That'd be more clean (imho), but I couldn't find a target-specific hook where to put that -- maybe I missed that?

#include <set>

namespace llvm {

enum AMXProgModelEnum { None = 0, DirectReg = 1, ManagedRA = 2 };

class X86MachineFunctionInfo;

namespace yaml {
template <> struct ScalarEnumerationTraits<AMXProgModelEnum> {
static void enumeration(IO &YamlIO, AMXProgModelEnum &Value) {
YamlIO.enumCase(Value, "None", AMXProgModelEnum::None);
YamlIO.enumCase(Value, "DirectReg", AMXProgModelEnum::DirectReg);
YamlIO.enumCase(Value, "ManagedRA", AMXProgModelEnum::ManagedRA);
}
};

struct X86MachineFunctionInfo final : public yaml::MachineFunctionInfo {
AMXProgModelEnum AMXProgModel;

X86MachineFunctionInfo() = default;
X86MachineFunctionInfo(const llvm::X86MachineFunctionInfo &MFI);

void mappingImpl(yaml::IO &YamlIO) override;
~X86MachineFunctionInfo() = default;
};

template <> struct MappingTraits<X86MachineFunctionInfo> {
static void mapping(IO &YamlIO, X86MachineFunctionInfo &MFI) {
YamlIO.mapOptional("amxProgModel", MFI.AMXProgModel);
}
};
} // end namespace yaml

/// X86MachineFunctionInfo - This class is derived from MachineFunction and
/// contains private X86 target-specific information for each MachineFunction.
class X86MachineFunctionInfo : public MachineFunctionInfo {
Expand Down Expand Up @@ -160,6 +190,8 @@ class X86MachineFunctionInfo : public MachineFunctionInfo {
const DenseMap<MachineBasicBlock *, MachineBasicBlock *> &Src2DstMBB)
const override;

void initializeBaseYamlFields(const yaml::X86MachineFunctionInfo &YamlMFI);

bool getForceFramePointer() const { return ForceFramePointer;}
void setForceFramePointer(bool forceFP) { ForceFramePointer = forceFP; }

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20 changes: 20 additions & 0 deletions llvm/lib/Target/X86/X86TargetMachine.cpp
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Expand Up @@ -31,6 +31,8 @@
#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
#include "llvm/CodeGen/GlobalISel/Legalizer.h"
#include "llvm/CodeGen/GlobalISel/RegBankSelect.h"
#include "llvm/CodeGen/MIRParser/MIParser.h"
#include "llvm/CodeGen/MIRYamlMapping.h"
#include "llvm/CodeGen/MachineScheduler.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/RegAllocRegistry.h"
Expand Down Expand Up @@ -344,6 +346,24 @@ X86TargetMachine::getSubtargetImpl(const Function &F) const {
return I.get();
}

yaml::MachineFunctionInfo *X86TargetMachine::createDefaultFuncInfoYAML() const {
return new yaml::X86MachineFunctionInfo();
}

yaml::MachineFunctionInfo *
X86TargetMachine::convertFuncInfoToYAML(const MachineFunction &MF) const {
const auto *MFI = MF.getInfo<X86MachineFunctionInfo>();
return new yaml::X86MachineFunctionInfo(*MFI);
}

bool X86TargetMachine::parseMachineFunctionInfo(
const yaml::MachineFunctionInfo &MFI, PerFunctionMIParsingState &PFS,
SMDiagnostic &Error, SMRange &SourceRange) const {
const auto &YamlMFI = static_cast<const yaml::X86MachineFunctionInfo &>(MFI);
PFS.MF.getInfo<X86MachineFunctionInfo>()->initializeBaseYamlFields(YamlMFI);
return false;
}

bool X86TargetMachine::isNoopAddrSpaceCast(unsigned SrcAS,
unsigned DestAS) const {
assert(SrcAS != DestAS && "Expected different address spaces!");
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8 changes: 8 additions & 0 deletions llvm/lib/Target/X86/X86TargetMachine.h
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Expand Up @@ -58,6 +58,14 @@ class X86TargetMachine final : public LLVMTargetMachine {
createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F,
const TargetSubtargetInfo *STI) const override;

yaml::MachineFunctionInfo *createDefaultFuncInfoYAML() const override;
yaml::MachineFunctionInfo *
convertFuncInfoToYAML(const MachineFunction &MF) const override;
bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &,
PerFunctionMIParsingState &PFS,
SMDiagnostic &Error,
SMRange &SourceRange) const override;

void registerPassBuilderCallbacks(PassBuilder &PB,
bool PopulateClassToPassNames) override;

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3 changes: 2 additions & 1 deletion llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi.mir
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Expand Up @@ -87,7 +87,8 @@ liveins:
- { reg: '$rsi', virtual-reg: '%14' }
frameInfo:
maxAlignment: 1
machineFunctionInfo: {}
machineFunctionInfo:
amxProgModel: ManagedRA
body: |
; CHECK-LABEL: name: foo
; CHECK: bb.0.entry:
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3 changes: 2 additions & 1 deletion llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi2.mir
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Expand Up @@ -34,7 +34,8 @@ liveins:
- { reg: '$edi', virtual-reg: '%12' }
frameInfo:
maxAlignment: 1
machineFunctionInfo: {}
machineFunctionInfo:
amxProgModel: ManagedRA
body: |
; CHECK-LABEL: name: foo
; CHECK: bb.0.entry:
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3 changes: 2 additions & 1 deletion llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi4.mir
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Expand Up @@ -35,7 +35,8 @@ liveins:
- { reg: '$edi', virtual-reg: '%12' }
frameInfo:
maxAlignment: 1
machineFunctionInfo: {}
machineFunctionInfo:
amxProgModel: ManagedRA
body: |
; CHECK-LABEL: name: foo
; CHECK: bb.0.entry:
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6 changes: 4 additions & 2 deletions llvm/test/CodeGen/X86/AMX/amx-fastconfig-spill.mir
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Expand Up @@ -23,7 +23,8 @@ frameInfo:
stack:
- { id: 0, size: 1024, alignment: 16 }
- { id: 1, size: 64, alignment: 4 }
machineFunctionInfo: {}
machineFunctionInfo:
amxProgModel: ManagedRA
body: |
; CHECK-LABEL: name: foo
; CHECK: bb.0.entry:
Expand Down Expand Up @@ -100,7 +101,8 @@ frameInfo:
stack:
- { id: 0, size: 1024, alignment: 16 }
- { id: 1, size: 64, alignment: 4 }
machineFunctionInfo: {}
machineFunctionInfo:
amxProgModel: ManagedRA
body: |
; CHECK-LABEL: name: copy
; CHECK: bb.0.entry:
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3 changes: 2 additions & 1 deletion llvm/test/CodeGen/X86/AMX/amx-fastconfig.mir
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Expand Up @@ -77,7 +77,8 @@ liveins:
- { reg: '$edx', virtual-reg: '%11' }
frameInfo:
maxAlignment: 1
machineFunctionInfo: {}
machineFunctionInfo:
amxProgModel: ManagedRA
body: |
; CHECK-LABEL: name: test_api
; CHECK: bb.0.entry:
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5 changes: 4 additions & 1 deletion llvm/test/CodeGen/X86/AMX/amx-fastpreconfig.mir
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Expand Up @@ -23,7 +23,8 @@ frameInfo:
stack:
- { id: 0, size: 1024, alignment: 16 }
- { id: 1, size: 64, alignment: 4 }
machineFunctionInfo: {}
machineFunctionInfo:
amxProgModel: ManagedRA
body: |
bb.0.entry:
; CHECK-LABEL: name: main
Expand Down Expand Up @@ -79,6 +80,8 @@ registers:
liveins:
- { reg: '$rdi', virtual-reg: '' }
- { reg: '$rsi', virtual-reg: '' }
machineFunctionInfo:
amxProgModel: ManagedRA
body: |
bb.1.entry:
liveins: $rdi, $rsi
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