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[X86] Replace hasVirtualTileReg with AMXProgModel #95105

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Merged
merged 1 commit into from
Jun 12, 2024
Merged

[X86] Replace hasVirtualTileReg with AMXProgModel #95105

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3 changes: 0 additions & 3 deletions llvm/lib/Target/X86/X86FastTileConfig.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -161,9 +161,6 @@ bool X86FastTileConfig::configBasicBlock(MachineBasicBlock &MBB) {
}
}

if (Change)
X86FI->setHasVirtualTileReg(true);

return Change;
}

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2 changes: 1 addition & 1 deletion llvm/lib/Target/X86/X86FrameLowering.cpp
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Expand Up @@ -2594,7 +2594,7 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF,
}

// Emit tilerelease for AMX kernel.
if (X86FI->hasVirtualTileReg())
if (X86FI->getAMXProgModel() == AMXProgModelEnum::ManagedRA)
BuildMI(MBB, Terminator, DL, TII.get(X86::TILERELEASE));
}

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7 changes: 0 additions & 7 deletions llvm/lib/Target/X86/X86MachineFunctionInfo.h
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Expand Up @@ -119,10 +119,6 @@ class X86MachineFunctionInfo : public MachineFunctionInfo {
/// other tools to detect the extended record.
bool HasSwiftAsyncContext = false;

/// True if this function has tile virtual register. This is used to
/// determine if we should insert tilerelease in frame lowering.
bool HasVirtualTileReg = false;

/// Ajust stack for push2/pop2
bool PadForPush2Pop2 = false;

Expand Down Expand Up @@ -250,9 +246,6 @@ class X86MachineFunctionInfo : public MachineFunctionInfo {
bool hasSwiftAsyncContext() const { return HasSwiftAsyncContext; }
void setHasSwiftAsyncContext(bool v) { HasSwiftAsyncContext = v; }

bool hasVirtualTileReg() const { return HasVirtualTileReg; }
void setHasVirtualTileReg(bool v) { HasVirtualTileReg = v; }

bool padForPush2Pop2() const { return PadForPush2Pop2; }
void setPadForPush2Pop2(bool V) { PadForPush2Pop2 = V; }

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1 change: 0 additions & 1 deletion llvm/lib/Target/X86/X86PreTileConfig.cpp
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Expand Up @@ -301,7 +301,6 @@ bool X86PreTileConfig::runOnMachineFunction(MachineFunction &MF) {
// There's no AMX instruction if we didn't find a tile config live in point.
if (CfgNeedInsert.empty())
return false;
X86FI->setHasVirtualTileReg(true);

// Avoid to insert ldtilecfg before any shape defs.
SmallVector<MachineBasicBlock *, 8> WorkList;
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