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[llvm][AArch64] apple-m4 is armv9.2-a #98267

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Jul 11, 2024
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8 changes: 2 additions & 6 deletions llvm/include/llvm/TargetParser/AArch64TargetParser.h
Original file line number Diff line number Diff line change
Expand Up @@ -161,14 +161,10 @@ struct CpuInfo {
StringRef Name; // Name, as written for -mcpu.
const ArchInfo &Arch;
AArch64::ExtensionBitset
DefaultExtensions; // Default extensions for this CPU. These will be
// ORd with the architecture defaults.
DefaultExtensions; // Default extensions for this CPU.

AArch64::ExtensionBitset getImpliedExtensions() const {
AArch64::ExtensionBitset ImpliedExts;
ImpliedExts |= DefaultExtensions;
ImpliedExts |= Arch.DefaultExts;
return ImpliedExts;
return DefaultExtensions;
Comment on lines -168 to +167
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IIUC, the idea here is that we don't want to add the architecture's default extensions to the CPU, because they are not mandatory, and there's no way to disable them for a CPU that chooses not to implement. This is why all the CPUs have had their list of features expanded.

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Yes, and that idea is the problem: automatically adding default extensions kinda works for extensions that the compiler doesn't generate automatically where their use is driven by intrinsics, but as soon as you have something like SVE in the list you get incompatible codegen left and right.

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This choice also makes -march= meaningless, so @ahmedbougacha and I are considering making that an error at least on Darwin platforms.

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Not sure I follow... Do you mean -march= has no effect if you specify -mcpu? That should probably be at least a warning.

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@jroelofs jroelofs Jul 12, 2024

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I mean that code built with -march=armv9.2a may use SVE instructions because FeatureSVE is in the default list for v9.0, but this will crash on an M4 iPad.

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}
};

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2 changes: 1 addition & 1 deletion llvm/lib/Target/AArch64/AArch64Features.td
Original file line number Diff line number Diff line change
Expand Up @@ -797,7 +797,7 @@ def HasV8_9aOps : Architecture64<8, 9, "a", "v8.9a",
!listconcat(HasV8_8aOps.DefaultExts, [FeatureSPECRES2, FeatureCSSC,
FeatureRASv2])>;
def HasV9_0aOps : Architecture64<9, 0, "a", "v9a",
[HasV8_5aOps, FeatureMEC],
[HasV8_5aOps],
!listconcat(HasV8_5aOps.DefaultExts, [FeatureFullFP16, FeatureSVE,
FeatureSVE2])>;
def HasV9_1aOps : Architecture64<9, 1, "a", "v9.1a",
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