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[SDag][ARM][RISCV] Allow lowering CTPOP into a libcall #99752

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Merged
merged 9 commits into from
Aug 2, 2024
Merged

[SDag][ARM][RISCV] Allow lowering CTPOP into a libcall #99752

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bb8a735
[SelectionDAG] Allow lowering CTPOP into a libcall
s-barannikov Jul 20, 2024
437a0e5
[ARM] Lower 32-bit CTPOP to a libcall
s-barannikov Jul 21, 2024
f90a6b4
[SelectionDAG] Legalize wide CTPOP via a libcall
s-barannikov Jul 21, 2024
66ae5db
[RISCV] Expand 64-bit CTPOP into a libcall
s-barannikov Jul 21, 2024
724bc32
[RISCV] Use libcall expansion for RV32, too
s-barannikov Jul 21, 2024
c418f1c
Make type legalizer create a libcall only if explicitly requested
s-barannikov Jul 29, 2024
fb985db
[RISCV] 32-bit popcount is not available in 64-bit libgcc
s-barannikov Jul 30, 2024
ae297d6
Merge branch 'main' into popcount-libcall
s-barannikov Jul 30, 2024
6b48d10
Merge branch 'main' into popcount-libcall
s-barannikov Aug 1, 2024
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3 changes: 3 additions & 0 deletions llvm/include/llvm/IR/RuntimeLibcalls.def
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Expand Up @@ -85,6 +85,9 @@ HANDLE_LIBCALL(NEG_I64, "__negdi2")
HANDLE_LIBCALL(CTLZ_I32, "__clzsi2")
HANDLE_LIBCALL(CTLZ_I64, "__clzdi2")
HANDLE_LIBCALL(CTLZ_I128, "__clzti2")
HANDLE_LIBCALL(CTPOP_I32, "__popcountsi2")
HANDLE_LIBCALL(CTPOP_I64, "__popcountdi2")
HANDLE_LIBCALL(CTPOP_I128, "__popcountti2")

// Floating-point
HANDLE_LIBCALL(ADD_F32, "__addsf3")
Expand Down
38 changes: 17 additions & 21 deletions llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
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Expand Up @@ -140,12 +140,9 @@ class SelectionDAGLegalize {
RTLIB::Libcall Call_F128,
RTLIB::Libcall Call_PPCF128,
SmallVectorImpl<SDValue> &Results);
SDValue ExpandIntLibCall(SDNode *Node, bool isSigned,
RTLIB::Libcall Call_I8,
RTLIB::Libcall Call_I16,
RTLIB::Libcall Call_I32,
RTLIB::Libcall Call_I64,
RTLIB::Libcall Call_I128);
SDValue ExpandIntLibCall(SDNode *Node, bool IsSigned, RTLIB::Libcall Call_I8,
RTLIB::Libcall Call_I16, RTLIB::Libcall Call_I32,
RTLIB::Libcall Call_I64, RTLIB::Libcall Call_I128);
Comment on lines +143 to +145
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Looks like a lot of unrelated format changes?

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I renamed isSigned -> IsSigned while I was here, clang-format insisted that I reformat this code fragment.
Do I need to revert these changes?

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Ah, didn't notice the capital letter change. I don't think it's necessary to change then.

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Can precommit this unrelated change

void ExpandArgFPLibCall(SDNode *Node,
RTLIB::Libcall Call_F32, RTLIB::Libcall Call_F64,
RTLIB::Libcall Call_F80, RTLIB::Libcall Call_F128,
Expand Down Expand Up @@ -2209,7 +2206,7 @@ void SelectionDAGLegalize::ExpandFPLibCall(SDNode* Node,
ExpandFPLibCall(Node, LC, Results);
}

SDValue SelectionDAGLegalize::ExpandIntLibCall(SDNode* Node, bool isSigned,
SDValue SelectionDAGLegalize::ExpandIntLibCall(SDNode *Node, bool IsSigned,
RTLIB::Libcall Call_I8,
RTLIB::Libcall Call_I16,
RTLIB::Libcall Call_I32,
Expand All @@ -2224,7 +2221,9 @@ SDValue SelectionDAGLegalize::ExpandIntLibCall(SDNode* Node, bool isSigned,
case MVT::i64: LC = Call_I64; break;
case MVT::i128: LC = Call_I128; break;
}
return ExpandLibCall(LC, Node, isSigned).first;
assert(LC != RTLIB::UNKNOWN_LIBCALL &&
"LibCall explicitly requested, but not available");
return ExpandLibCall(LC, Node, IsSigned).first;
}

/// Expand the node to a libcall based on first argument type (for instance
Expand Down Expand Up @@ -4980,19 +4979,16 @@ void SelectionDAGLegalize::ConvertNodeToLibcall(SDNode *Node) {
RTLIB::MUL_I64, RTLIB::MUL_I128));
break;
case ISD::CTLZ_ZERO_UNDEF:
switch (Node->getSimpleValueType(0).SimpleTy) {
default:
llvm_unreachable("LibCall explicitly requested, but not available");
case MVT::i32:
Results.push_back(ExpandLibCall(RTLIB::CTLZ_I32, Node, false).first);
break;
case MVT::i64:
Results.push_back(ExpandLibCall(RTLIB::CTLZ_I64, Node, false).first);
break;
case MVT::i128:
Results.push_back(ExpandLibCall(RTLIB::CTLZ_I128, Node, false).first);
break;
}
Results.push_back(ExpandIntLibCall(Node, /*IsSigned=*/false,
RTLIB::UNKNOWN_LIBCALL,
RTLIB::UNKNOWN_LIBCALL, RTLIB::CTLZ_I32,
RTLIB::CTLZ_I64, RTLIB::CTLZ_I128));
break;
case ISD::CTPOP:
Results.push_back(ExpandIntLibCall(Node, /*IsSigned=*/false,
RTLIB::UNKNOWN_LIBCALL,
RTLIB::UNKNOWN_LIBCALL, RTLIB::CTPOP_I32,
RTLIB::CTPOP_I64, RTLIB::CTPOP_I128));
break;
case ISD::RESET_FPENV: {
// It is legalized to call 'fesetenv(FE_DFL_ENV)'. On most targets
Expand Down
35 changes: 28 additions & 7 deletions llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
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Expand Up @@ -3847,15 +3847,36 @@ void DAGTypeLegalizer::ExpandIntRes_CTLZ(SDNode *N,
Hi = DAG.getConstant(0, dl, NVT);
}

void DAGTypeLegalizer::ExpandIntRes_CTPOP(SDNode *N,
SDValue &Lo, SDValue &Hi) {
SDLoc dl(N);
void DAGTypeLegalizer::ExpandIntRes_CTPOP(SDNode *N, SDValue &Lo, SDValue &Hi) {
SDValue Op = N->getOperand(0);
EVT VT = N->getValueType(0);
SDLoc DL(N);

// If the narrow CTPOP is not supported by the target, try to convert it
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Do we really have to handle the libcall logic during type legalization? Can this just adjust the type, and leave the libcall for the libcall action

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If we expand it later, we will end up with two libcalls for an illegal type instead of one (best case), or those two libcalls will be expanded into scalar code. You can see the difference in this commit.
This is primarily for 32-bit targets calling i64 CTPOP.

// to a libcall.
EVT ExpandedVT = TLI.getTypeToExpandTo(*DAG.getContext(), VT);
if (!TLI.isOperationLegalOrCustom(ISD::CTPOP, ExpandedVT)) {
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Should at least check if this is the libcall action

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I was thinking about this too, but I found only one place where LibCall action is checked. That made me wonder if this is the right thing to do. Hopefully someone can tell for sure.

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Yes. This is a stalled migration. Ideally the Expand action would never produce a libcall.

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@s-barannikov s-barannikov Jul 29, 2024 •
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Changed to check for LibCall action.
Changes in one LoongArch test got reverted, probably for the better.

RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
if (VT == MVT::i32)
LC = RTLIB::CTPOP_I32;
else if (VT == MVT::i64)
LC = RTLIB::CTPOP_I64;
else if (VT == MVT::i128)
LC = RTLIB::CTPOP_I128;
if (LC != RTLIB::UNKNOWN_LIBCALL && TLI.getLibcallName(LC)) {
TargetLowering::MakeLibCallOptions CallOptions;
SDValue Res = TLI.makeLibCall(DAG, LC, VT, Op, CallOptions, DL).first;
SplitInteger(Res, Lo, Hi);
return;
}
}

// ctpop(HiLo) -> ctpop(Hi)+ctpop(Lo)
GetExpandedInteger(N->getOperand(0), Lo, Hi);
GetExpandedInteger(Op, Lo, Hi);
EVT NVT = Lo.getValueType();
Lo = DAG.getNode(ISD::ADD, dl, NVT, DAG.getNode(ISD::CTPOP, dl, NVT, Lo),
DAG.getNode(ISD::CTPOP, dl, NVT, Hi));
Hi = DAG.getConstant(0, dl, NVT);
Lo = DAG.getNode(ISD::ADD, DL, NVT, DAG.getNode(ISD::CTPOP, DL, NVT, Lo),
DAG.getNode(ISD::CTPOP, DL, NVT, Hi));
Hi = DAG.getConstant(0, DL, NVT);
}

void DAGTypeLegalizer::ExpandIntRes_CTTZ(SDNode *N,
Expand Down
5 changes: 3 additions & 2 deletions llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
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Expand Up @@ -9127,8 +9127,9 @@ SDValue TargetLowering::expandCTTZ(SDNode *Node, SelectionDAG &DAG) const {
!isOperationLegalOrCustomOrPromote(ISD::XOR, VT)))
return SDValue();

// Emit Table Lookup if ISD::CTLZ and ISD::CTPOP are not legal.
if (!VT.isVector() && isOperationExpand(ISD::CTPOP, VT) &&
// Emit Table Lookup if ISD::CTPOP used in the fallback path below is going
// to be expanded or converted to a libcall.
if (!VT.isVector() && !isOperationLegalOrCustomOrPromote(ISD::CTPOP, VT) &&
!isOperationLegal(ISD::CTLZ, VT))
if (SDValue V = CTTZTableLookup(Node, DAG, dl, VT, Op, NumBitsPerElt))
return V;
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Target/ARM/ARMISelLowering.cpp
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Expand Up @@ -1204,7 +1204,7 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM,
setOperationAction(ISD::ROTR, VT, Expand);
}
setOperationAction(ISD::CTTZ, MVT::i32, Custom);
setOperationAction(ISD::CTPOP, MVT::i32, Expand);
setOperationAction(ISD::CTPOP, MVT::i32, LibCall);
if (!Subtarget->hasV5TOps() || Subtarget->isThumb1Only()) {
setOperationAction(ISD::CTLZ, MVT::i32, Expand);
setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, LibCall);
Expand Down
9 changes: 6 additions & 3 deletions llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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Expand Up @@ -388,9 +388,12 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
setOperationAction({ISD::CTTZ, ISD::CTTZ_ZERO_UNDEF}, MVT::i32, Custom);
}
} else if (!Subtarget.hasVendorXCVbitmanip()) {
setOperationAction({ISD::CTTZ, ISD::CTPOP}, XLenVT, Expand);
if (RV64LegalI32 && Subtarget.is64Bit())
setOperationAction({ISD::CTTZ, ISD::CTPOP}, MVT::i32, Expand);
setOperationAction(ISD::CTTZ, XLenVT, Expand);
setOperationAction(ISD::CTPOP, XLenVT, LibCall);
if (RV64LegalI32 && Subtarget.is64Bit()) {
setOperationAction(ISD::CTTZ, MVT::i32, Expand);
setOperationAction(ISD::CTPOP, MVT::i32, LibCall);
}
}

if (Subtarget.hasStdExtZbb() || Subtarget.hasVendorXTHeadBb() ||
Expand Down
16 changes: 8 additions & 8 deletions llvm/test/Analysis/CostModel/RISCV/int-bit-manip.ll
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Expand Up @@ -159,7 +159,7 @@ define void @bitreverse() {

define void @ctpop() {
; NOZVBB-LABEL: 'ctpop'
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = call i8 @llvm.ctpop.i8(i8 undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = call i8 @llvm.ctpop.i8(i8 undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %2 = call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %3 = call <4 x i8> @llvm.ctpop.v4i8(<4 x i8> undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %4 = call <8 x i8> @llvm.ctpop.v8i8(<8 x i8> undef)
Expand All @@ -169,7 +169,7 @@ define void @ctpop() {
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %8 = call <vscale x 4 x i8> @llvm.ctpop.nxv4i8(<vscale x 4 x i8> undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %9 = call <vscale x 8 x i8> @llvm.ctpop.nxv8i8(<vscale x 8 x i8> undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %10 = call <vscale x 16 x i8> @llvm.ctpop.nxv16i8(<vscale x 16 x i8> undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %11 = call i16 @llvm.ctpop.i16(i16 undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %11 = call i16 @llvm.ctpop.i16(i16 undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 19 for instruction: %12 = call <2 x i16> @llvm.ctpop.v2i16(<2 x i16> undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 19 for instruction: %13 = call <4 x i16> @llvm.ctpop.v4i16(<4 x i16> undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 19 for instruction: %14 = call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> undef)
Expand All @@ -179,7 +179,7 @@ define void @ctpop() {
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 19 for instruction: %18 = call <vscale x 4 x i16> @llvm.ctpop.nxv4i16(<vscale x 4 x i16> undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 19 for instruction: %19 = call <vscale x 8 x i16> @llvm.ctpop.nxv8i16(<vscale x 8 x i16> undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 19 for instruction: %20 = call <vscale x 16 x i16> @llvm.ctpop.nxv16i16(<vscale x 16 x i16> undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %21 = call i32 @llvm.ctpop.i32(i32 undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %21 = call i32 @llvm.ctpop.i32(i32 undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %22 = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %23 = call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %24 = call <8 x i32> @llvm.ctpop.v8i32(<8 x i32> undef)
Expand All @@ -189,7 +189,7 @@ define void @ctpop() {
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %28 = call <vscale x 4 x i32> @llvm.ctpop.nxv4i32(<vscale x 4 x i32> undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %29 = call <vscale x 8 x i32> @llvm.ctpop.nxv8i32(<vscale x 8 x i32> undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %30 = call <vscale x 16 x i32> @llvm.ctpop.nxv16i32(<vscale x 16 x i32> undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %31 = call i64 @llvm.ctpop.i64(i64 undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %31 = call i64 @llvm.ctpop.i64(i64 undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %32 = call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %33 = call <4 x i64> @llvm.ctpop.v4i64(<4 x i64> undef)
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %34 = call <8 x i64> @llvm.ctpop.v8i64(<8 x i64> undef)
Expand All @@ -202,7 +202,7 @@ define void @ctpop() {
; NOZVBB-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
; ZVBB-LABEL: 'ctpop'
; ZVBB-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = call i8 @llvm.ctpop.i8(i8 undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = call i8 @llvm.ctpop.i8(i8 undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %2 = call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %3 = call <4 x i8> @llvm.ctpop.v4i8(<4 x i8> undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %4 = call <8 x i8> @llvm.ctpop.v8i8(<8 x i8> undef)
Expand All @@ -212,7 +212,7 @@ define void @ctpop() {
; ZVBB-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %8 = call <vscale x 4 x i8> @llvm.ctpop.nxv4i8(<vscale x 4 x i8> undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %9 = call <vscale x 8 x i8> @llvm.ctpop.nxv8i8(<vscale x 8 x i8> undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %10 = call <vscale x 16 x i8> @llvm.ctpop.nxv16i8(<vscale x 16 x i8> undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %11 = call i16 @llvm.ctpop.i16(i16 undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %11 = call i16 @llvm.ctpop.i16(i16 undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %12 = call <2 x i16> @llvm.ctpop.v2i16(<2 x i16> undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %13 = call <4 x i16> @llvm.ctpop.v4i16(<4 x i16> undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %14 = call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> undef)
Expand All @@ -222,7 +222,7 @@ define void @ctpop() {
; ZVBB-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %18 = call <vscale x 4 x i16> @llvm.ctpop.nxv4i16(<vscale x 4 x i16> undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %19 = call <vscale x 8 x i16> @llvm.ctpop.nxv8i16(<vscale x 8 x i16> undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %20 = call <vscale x 16 x i16> @llvm.ctpop.nxv16i16(<vscale x 16 x i16> undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %21 = call i32 @llvm.ctpop.i32(i32 undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %21 = call i32 @llvm.ctpop.i32(i32 undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %22 = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %23 = call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %24 = call <8 x i32> @llvm.ctpop.v8i32(<8 x i32> undef)
Expand All @@ -232,7 +232,7 @@ define void @ctpop() {
; ZVBB-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %28 = call <vscale x 4 x i32> @llvm.ctpop.nxv4i32(<vscale x 4 x i32> undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %29 = call <vscale x 8 x i32> @llvm.ctpop.nxv8i32(<vscale x 8 x i32> undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %30 = call <vscale x 16 x i32> @llvm.ctpop.nxv16i32(<vscale x 16 x i32> undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %31 = call i64 @llvm.ctpop.i64(i64 undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %31 = call i64 @llvm.ctpop.i64(i64 undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %32 = call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %33 = call <4 x i64> @llvm.ctpop.v4i64(<4 x i64> undef)
; ZVBB-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %34 = call <8 x i64> @llvm.ctpop.v8i64(<8 x i64> undef)
Expand Down
64 changes: 5 additions & 59 deletions llvm/test/CodeGen/ARM/popcnt.ll
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Expand Up @@ -324,73 +324,19 @@ define i32 @ctpop16(i16 %x) nounwind readnone {
define i32 @ctpop32(i32 %x) nounwind readnone {
; CHECK-LABEL: ctpop32:
; CHECK: @ %bb.0:
; CHECK-NEXT: ldr r1, .LCPI22_0
; CHECK-NEXT: ldr r2, .LCPI22_3
; CHECK-NEXT: and r1, r1, r0, lsr #1
; CHECK-NEXT: ldr r12, .LCPI22_1
; CHECK-NEXT: sub r0, r0, r1
; CHECK-NEXT: ldr r3, .LCPI22_2
; CHECK-NEXT: and r1, r0, r2
; CHECK-NEXT: and r0, r2, r0, lsr #2
; CHECK-NEXT: add r0, r1, r0
; CHECK-NEXT: add r0, r0, r0, lsr #4
; CHECK-NEXT: and r0, r0, r12
; CHECK-NEXT: mul r1, r0, r3
; CHECK-NEXT: lsr r0, r1, #24
; CHECK-NEXT: mov pc, lr
; CHECK-NEXT: .p2align 2
; CHECK-NEXT: @ %bb.1:
; CHECK-NEXT: .LCPI22_0:
; CHECK-NEXT: .long 1431655765 @ 0x55555555
; CHECK-NEXT: .LCPI22_1:
; CHECK-NEXT: .long 252645135 @ 0xf0f0f0f
; CHECK-NEXT: .LCPI22_2:
; CHECK-NEXT: .long 16843009 @ 0x1010101
; CHECK-NEXT: .LCPI22_3:
; CHECK-NEXT: .long 858993459 @ 0x33333333
; CHECK-NEXT: b __popcountsi2
%count = tail call i32 @llvm.ctpop.i32(i32 %x)
ret i32 %count
}

define i32 @ctpop64(i64 %x) nounwind readnone {
; CHECK-LABEL: ctpop64:
; CHECK: @ %bb.0:
; CHECK-NEXT: .save {r4, lr}
; CHECK-NEXT: push {r4, lr}
; CHECK-NEXT: ldr r2, .LCPI23_0
; CHECK-NEXT: ldr r3, .LCPI23_3
; CHECK-NEXT: and r4, r2, r0, lsr #1
; CHECK-NEXT: and r2, r2, r1, lsr #1
; CHECK-NEXT: sub r0, r0, r4
; CHECK-NEXT: sub r1, r1, r2
; CHECK-NEXT: and r4, r0, r3
; CHECK-NEXT: and r2, r1, r3
; CHECK-NEXT: and r0, r3, r0, lsr #2
; CHECK-NEXT: and r1, r3, r1, lsr #2
; CHECK-NEXT: add r0, r4, r0
; CHECK-NEXT: ldr lr, .LCPI23_1
; CHECK-NEXT: add r1, r2, r1
; CHECK-NEXT: ldr r12, .LCPI23_2
; CHECK-NEXT: add r0, r0, r0, lsr #4
; CHECK-NEXT: and r0, r0, lr
; CHECK-NEXT: add r1, r1, r1, lsr #4
; CHECK-NEXT: mul r2, r0, r12
; CHECK-NEXT: and r0, r1, lr
; CHECK-NEXT: mul r1, r0, r12
; CHECK-NEXT: lsr r0, r2, #24
; CHECK-NEXT: add r0, r0, r1, lsr #24
; CHECK-NEXT: pop {r4, lr}
; CHECK-NEXT: .save {r11, lr}
; CHECK-NEXT: push {r11, lr}
; CHECK-NEXT: bl __popcountdi2
; CHECK-NEXT: pop {r11, lr}
; CHECK-NEXT: mov pc, lr
; CHECK-NEXT: .p2align 2
; CHECK-NEXT: @ %bb.1:
; CHECK-NEXT: .LCPI23_0:
; CHECK-NEXT: .long 1431655765 @ 0x55555555
; CHECK-NEXT: .LCPI23_1:
; CHECK-NEXT: .long 252645135 @ 0xf0f0f0f
; CHECK-NEXT: .LCPI23_2:
; CHECK-NEXT: .long 16843009 @ 0x1010101
; CHECK-NEXT: .LCPI23_3:
; CHECK-NEXT: .long 858993459 @ 0x33333333
%count = tail call i64 @llvm.ctpop.i64(i64 %x)
%conv = trunc i64 %count to i32
ret i32 %conv
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39 changes: 5 additions & 34 deletions llvm/test/CodeGen/LoongArch/ctlz-cttz-ctpop.ll
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Expand Up @@ -297,40 +297,11 @@ define i32 @test_ctpop_i32(i32 %a) nounwind {
define i64 @test_ctpop_i64(i64 %a) nounwind {
; LA32-LABEL: test_ctpop_i64:
; LA32: # %bb.0:
; LA32-NEXT: srli.w $a2, $a1, 1
; LA32-NEXT: lu12i.w $a3, 349525
; LA32-NEXT: ori $a3, $a3, 1365
; LA32-NEXT: and $a2, $a2, $a3
; LA32-NEXT: sub.w $a1, $a1, $a2
; LA32-NEXT: lu12i.w $a2, 209715
; LA32-NEXT: ori $a2, $a2, 819
; LA32-NEXT: and $a4, $a1, $a2
; LA32-NEXT: srli.w $a1, $a1, 2
; LA32-NEXT: and $a1, $a1, $a2
; LA32-NEXT: add.w $a1, $a4, $a1
; LA32-NEXT: srli.w $a4, $a1, 4
; LA32-NEXT: add.w $a1, $a1, $a4
; LA32-NEXT: lu12i.w $a4, 61680
; LA32-NEXT: ori $a4, $a4, 3855
; LA32-NEXT: and $a1, $a1, $a4
; LA32-NEXT: lu12i.w $a5, 4112
; LA32-NEXT: ori $a5, $a5, 257
; LA32-NEXT: mul.w $a1, $a1, $a5
; LA32-NEXT: srli.w $a1, $a1, 24
; LA32-NEXT: srli.w $a6, $a0, 1
; LA32-NEXT: and $a3, $a6, $a3
; LA32-NEXT: sub.w $a0, $a0, $a3
; LA32-NEXT: and $a3, $a0, $a2
; LA32-NEXT: srli.w $a0, $a0, 2
; LA32-NEXT: and $a0, $a0, $a2
; LA32-NEXT: add.w $a0, $a3, $a0
; LA32-NEXT: srli.w $a2, $a0, 4
; LA32-NEXT: add.w $a0, $a0, $a2
; LA32-NEXT: and $a0, $a0, $a4
; LA32-NEXT: mul.w $a0, $a0, $a5
; LA32-NEXT: srli.w $a0, $a0, 24
; LA32-NEXT: add.w $a0, $a0, $a1
; LA32-NEXT: move $a1, $zero
; LA32-NEXT: addi.w $sp, $sp, -16
; LA32-NEXT: st.w $ra, $sp, 12 # 4-byte Folded Spill
; LA32-NEXT: bl %plt(__popcountdi2)
; LA32-NEXT: ld.w $ra, $sp, 12 # 4-byte Folded Reload
; LA32-NEXT: addi.w $sp, $sp, 16
; LA32-NEXT: ret
;
; LA64-LABEL: test_ctpop_i64:
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