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d2168b0
initial commit of the csr and streaming IPA code sample
intel-jisheng1 Oct 18, 2022
6915be8
update sample.json
intel-jisheng1 Oct 18, 2022
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intel-jisheng1 Oct 18, 2022
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Merge branch 'oneapi-src:master' into CSR_and_streaming_interfaces
intel-jisheng1 Nov 21, 2022
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move under experimental/
intel-jisheng1 Nov 21, 2022
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intel-jisheng1 Nov 21, 2022
878effd
partially resolve comments
intel-jisheng1 Dec 7, 2022
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Merge branch 'oneapi-src:master' into CSR_and_streaming_interfaces
intel-jisheng1 Dec 7, 2022
699e6cf
Merge branch 'CSR_and_streaming_interfaces' of https://github.com/int…
intel-jisheng1 Dec 7, 2022
9bbe18d
rename entire sample to avoid reference to CSR
intel-jisheng1 Dec 7, 2022
9bd7bcc
switch to register map and add lambda example
intel-jisheng1 Dec 8, 2022
4ee3d4b
fix grammar
intel-jisheng1 Dec 8, 2022
25aa20c
add README in sample.json
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update no hardware target note
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remove Makefile tutorial
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intel-jisheng1 Dec 14, 2022
694f35c
separate kernels into own cpps
intel-jisheng1 Jan 5, 2023
1b18b35
separate kernels in cmakelists
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intel-jisheng1 Jan 5, 2023
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register in top level readme
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intel-jisheng1 Jan 10, 2023
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Merge branch 'oneapi-src:master' into CSR_and_streaming_interfaces
intel-jisheng1 Jan 10, 2023
8f0ae26
Merge branch 'CSR_and_streaming_interfaces' of https://github.com/int…
intel-jisheng1 Jan 10, 2023
d2d2a1c
move to C++SYCL_FPGA
intel-jisheng1 Jan 10, 2023
17abcce
update ci test
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intel-jisheng1 Jan 10, 2023
91a138d
add fpga target in cmake
intel-jisheng1 Jan 13, 2023
95bb3c2
add fpga target in readme
intel-jisheng1 Jan 13, 2023
fdb5c1c
switch to new device selector
intel-jisheng1 Jan 13, 2023
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intel-jisheng1 Jan 16, 2023
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intel-jisheng1 Jan 17, 2023
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target Agilex
intel-jisheng1 Jan 17, 2023
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intel-jisheng1 Jan 17, 2023
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rename sample
intel-jisheng1 Jan 18, 2023
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intel-jisheng1 Jan 18, 2023
e52a284
incorporate PR #1307
intel-jisheng1 Jan 30, 2023
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Merge branch 'development' into CSR_and_streaming_interfaces
intel-jisheng1 Jan 30, 2023
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intel-jisheng1 Feb 3, 2023
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Merge branch 'CSR_and_streaming_interfaces' of https://github.com/int…
intel-jisheng1 Feb 3, 2023
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40 changes: 21 additions & 19 deletions DirectProgramming/C++SYCL_FPGA/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -74,25 +74,27 @@ flowchart LR
style tier4 fill:#0071c1,stroke:#0071c1,stroke-width:1px,color:#fff
```

| Sample | Category | Description
|:--- |:--- |:---
| [ac_fixed](Tutorials/Features/ac_fixed) | [Tutorials/Features](Tutorials/Features) | How different methods of `ac_fixed` number construction affect hardware resource utilization <br> Recommended method for constructing `ac_fixed` numbers in your kernel <br> Accessing and using the `ac_fixed` math library functions <br> Trading off accuracy of results for reduced resource usage on the FPGA
| [ac_int](Tutorials/Features/ac_int) | [Tutorials/Features](Tutorials/Features) | Using the `ac_int` data type for basic operations <br> Efficiently using the left shift operation <br> Setting and reading certain bits of an `ac_int` number
| [device_global (experimental)](Tutorials/Features/experimental/device_global)| [Tutorials/Features](Tutorials/Features) | The basic usage of the `device_global` class <br> How to initialize a `device_global` to non-zero values

| [double_buffering](Tutorials/DesignPatterns/double_buffering) | [Tutorials/DesignPatterns](Tutorials/DesignPatterns) | How and when to implement the double buffering optimization technique
| [explicit_data_movement](Tutorials/DesignPatterns/explicit_data_movement) | [Tutorials/DesignPatterns](Tutorials/DesignPatterns) | How to explicitly manage the movement of data for the FPGA
| [hostpipes (experimental)](Tutorials/Features/experimental/hostpipes) | [Tutorials/Features](Tutorials/Features) | How to use host pipes to send and receive data between a host and the FPGA
| [kernel_args_restrict](Tutorials/Features/kernel_args_restrict) | [Tutorials/Features](Tutorials/Features) | The problem of pointer aliasing and its impact on compiler optimizations. <br> The behavior of the `kernel_args_restrict` attribute and when to use it on your kernel <br> The effect this attribute can have on kernel performance on FPGA
| [loop_coalesce](Tutorials/Features/loop_coalesce) | [Tutorials/Features](Tutorials/Features) | What the `loop_coalesce` attribute does <br> How `loop_coalesce` attribute affects resource usage and loop throughput <br> How to apply the `loop_coalesce` attribute to loops in your program <br> Which loops make good candidates for coalescing
| [loop_fusion](Tutorials/Features/loop_fusion) | [Tutorials/Features](Tutorials/Features) | Basics of loop fusion <br> The reasons for loop fusion<br/>How to use loop fusion to increase performance <br> Understanding safe application of loop fusion
| [loop_initiation_interval](Tutorials/Features/loop_initiation_interval) | [Tutorials/Features](Tutorials/Features) | The f<sub>MAX</sub>-II tradeoff <br> Default behavior of the compiler when scheduling loops <br> How to use `intel::initiation_interval` to attempt to set the II for a loop <br> Scenarios in which `intel::initiation_interval` can be helpful in optimizing kernel performance
| [loop_ivdep](Tutorials/Features/loop_ivdep) | [Tutorials/Features](Tutorials/Features) | Basics of loop-carried dependencies <br> The notion of a loop-carried dependence distance <br> What constitutes a safe dependence distance <br> How to aid the compiler's dependence analysis to maximize performance
| [loop_unroll](Tutorials/Features/loop_unroll) | [Tutorials/Features](Tutorials/Features) | Basics of loop unrolling. <br> How to unroll loops in your program <br> Determining the optimal unroll factor for your program
| [max_interleaving](Tutorials/Features/max_interleaving) | [Tutorials/Features](Tutorials/Features) | The basic usage of the `max_interleaving` attribute <br> How the `max_interleaving` attribute affects loop resource use <br> How to apply the `max_interleaving` attribute to loops in your program
| [memory_attributes](Tutorials/Features/memory_attributes) | [Tutorials/Features](Tutorials/Features) | The basic concepts of on-chip memory attributes <br> How to apply memory attributes in your program <br> How to confirm that the memory attributes were respected by the compiler <br> A case study of the type of performance/area trade-offs enabled by memory attributes
| [pipes](Tutorials/Features/pipes) | [Tutorials/Features](Tutorials/Features) | The basics of using SYCL*-compliant pipes extension for FPGA <br> How to declare and use pipes
| [printf](Tutorials/Features/printf) | [Tutorials/DesignPatterns](Tutorials/DesignPatterns) | How to declare and use `printf` in program

| Sample | Category | Description
|:--- |:--- |:---
| [ac_fixed](Tutorials/Features/ac_fixed) | [Tutorials/Features](Tutorials/Features) | How different methods of `ac_fixed` number construction affect hardware resource utilization <br> Recommended method for constructing `ac_fixed` numbers in your kernel <br> Accessing and using the `ac_fixed` math library functions <br> Trading off accuracy of results for reduced resource usage on the FPGA
| [ac_int](Tutorials/Features/ac_int) | [Tutorials/Features](Tutorials/Features) | Using the `ac_int` data type for basic operations <br> Efficiently using the left shift operation <br> Setting and reading certain bits of an `ac_int` number
| [device_global (experimental)](Tutorials/Features/experimental/device_global) | [Tutorials/Features](Tutorials/Features) | The basic usage of the `device_global` class <br> How to initialize a `device_global` to non-zero values
| [double_buffering](Tutorials/DesignPatterns/double_buffering) | [Tutorials/DesignPatterns](Tutorials/DesignPatterns) | How and when to implement the double buffering optimization technique
| [explicit_data_movement](Tutorials/DesignPatterns/explicit_data_movement) | [Tutorials/DesignPatterns](Tutorials/DesignPatterns) | How to explicitly manage the movement of data for the FPGA
| [hostpipes (experimental)](Tutorials/Features/experimental/hostpipes) | [Tutorials/Features](Tutorials/Features) | How to use host pipes to send and receive data between a host and the FPGA
| [kernel_args_restrict](Tutorials/Features/kernel_args_restrict) | [Tutorials/Features](Tutorials/Features) | The problem of pointer aliasing and its impact on compiler optimizations. <br> The behavior of the `kernel_args_restrict` attribute and when to use it on your kernel <br> The effect this attribute can have on kernel performance on FPGA
| [loop_coalesce](Tutorials/Features/loop_coalesce) | [Tutorials/Features](Tutorials/Features) | What the `loop_coalesce` attribute does <br> How `loop_coalesce` attribute affects resource usage and loop throughput <br> How to apply the `loop_coalesce` attribute to loops in your program <br> Which loops make good candidates for coalescing
| [loop_fusion](Tutorials/Features/loop_fusion) | [Tutorials/Features](Tutorials/Features) | Basics of loop fusion <br> The reasons for loop fusion<br/>How to use loop fusion to increase performance <br> Understanding safe application of loop fusion
| [loop_initiation_interval](Tutorials/Features/loop_initiation_interval) | [Tutorials/Features](Tutorials/Features) | The f<sub>MAX</sub>-II tradeoff <br> Default behavior of the compiler when scheduling loops <br> How to use `intel::initiation_interval` to attempt to set the II for a loop <br> Scenarios in which `intel::initiation_interval` can be helpful in optimizing kernel performance
| [loop_ivdep](Tutorials/Features/loop_ivdep) | [Tutorials/Features](Tutorials/Features) | Basics of loop-carried dependencies <br> The notion of a loop-carried dependence distance <br> What constitutes a safe dependence distance <br> How to aid the compiler's dependence analysis to maximize performance
| [loop_unroll](Tutorials/Features/loop_unroll) | [Tutorials/Features](Tutorials/Features) | Basics of loop unrolling. <br> How to unroll loops in your program <br> Determining the optimal unroll factor for your program
| [max_interleaving](Tutorials/Features/max_interleaving) | [Tutorials/Features](Tutorials/Features) | The basic usage of the `max_interleaving` attribute <br> How the `max_interleaving` attribute affects loop resource use <br> How to apply the `max_interleaving` attribute to loops in your program
| [memory_attributes](Tutorials/Features/memory_attributes) | [Tutorials/Features](Tutorials/Features) | The basic concepts of on-chip memory attributes <br> How to apply memory attributes in your program <br> How to confirm that the memory attributes were respected by the compiler <br> A case study of the type of performance/area trade-offs enabled by memory attributes
| [pipes](Tutorials/Features/pipes) | [Tutorials/Features](Tutorials/Features) | The basics of using SYCL*-compliant pipes extension for FPGA <br> How to declare and use pipes
| [printf](Tutorials/Features/printf) | [Tutorials/DesignPatterns](Tutorials/DesignPatterns) | How to declare and use `printf` in program
| [register_map_and_streaming_interfaces (experimental)](Tutorials/Features/experimental/register_map_and_streaming_interfaces) | [Tutorials/Features](Tutorials/Features) | How to specify the kernel invocation interface and kernel argument interfaces


#### Tier 3: Explore the Advances Techniques

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Original file line number Diff line number Diff line change
@@ -0,0 +1,20 @@
if(UNIX)
# Direct CMake to use icpx rather than the default C++ compiler/linker
set(CMAKE_CXX_COMPILER icpx)
else() # Windows
# Force CMake to use icpx rather than the default C++ compiler/linker
# (needed on Windows only)
include (CMakeForceCompiler)
CMAKE_FORCE_CXX_COMPILER (icx-cl IntelDPCPP)
include (Platform/Windows-Clang)
endif()

cmake_minimum_required (VERSION 3.4)

project(register_map_and_streaming_interfaces CXX)

set(CMAKE_ARCHIVE_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR})
set(CMAKE_LIBRARY_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR})
set(CMAKE_RUNTIME_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR})

add_subdirectory (src)
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