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FPGA: Update throughput numbers for mvdr_beamforming design for 2023.1 release #1325

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Jan 27, 2023
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FPGA: Update throughput numbers for mvdr_beamforming design for 2023.1 release #1325

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2 changes: 1 addition & 1 deletion DirectProgramming/C++SYCL_FPGA/ReferenceDesigns/mvdr_beamforming/README.md
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Expand Up @@ -336,7 +336,7 @@ Training matrix rows : 48
Data rows per training matrix : 48
Steering vectors : 25
Streaming pipe width : 4
Throughput: 233793 matrices/second
Throughput: 177299 matrices/second
Checking output data against ../data/small_expected_out_real.txt and ../data/small_expected_out_imag.txt
Output data check succeeded
PASSED
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