Skip to content

FPGA: Reduce test size from 64 to 2 for memory_attributes simulator target #1390

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 2 commits into from
Feb 28, 2023
Merged
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,11 @@ using namespace sycl;
constexpr size_t kRows = 8;
constexpr size_t kVec = 4;
constexpr size_t kMaxVal = 512;
#if defined (FPGA_SIMULATOR)
constexpr size_t kNumTests = 2;
#else
constexpr size_t kNumTests = 64;
#endif
constexpr size_t kMaxIter = 8;

// Forward declare the kernel name in the global scope.
Expand Down