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FPGA: Set fp model to "precise" for ac_fixed sample #1482

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Mar 27, 2023
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Original file line number Diff line number Diff line change
Expand Up @@ -132,6 +132,8 @@ When you use the `ac_fixed` library, keep the following points in mind:

The host program for this tutorial shows the accuracy differences between the result provided by floating point math library and the result provided by the `ac_fixed` math library functions, where the `float` version generates a more accurate result than the smaller-sized `ac_fixed` version.

Note: the program is compiled with fp-model set to "precise", so the accuracy of the floating-point math functions conform to the IEEE standard.

- Emulation vs FPGA Hardware for fixed point math operations

Due to the differences in the internal math implementations, the results from `ac_fixed` math functions in emulation and FPGA hardware might not always be bit-accurate. This tutorial shows how to build and run the sample for emulation and FPGA hardware so you can observe the difference.
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Original file line number Diff line number Diff line change
Expand Up @@ -19,9 +19,9 @@ endif()
# 2. /Qactypes Include ac_types headers and link against ac_types emulation libraries
if(WIN32)
set(WIN_FLAG "/EHsc")
set(AC_TYPES_FLAG "/Qactypes")
set(AC_TYPES_FLAG "/Qactypes /fp:precise")
else()
set(AC_TYPES_FLAG "-qactypes")
set(AC_TYPES_FLAG "-qactypes -fp-model=precise")
endif()

# A SYCL ahead-of-time (AoT) compile processes the device code in two stages.
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