Cortex A7 support?

[UniqueActive]

Hello,

First of all, I am completely new to embedded development and relatively new to Rust, but I have an ARMv7 board with the Allwinner A20 (Olimex A20 OLinuXinoLime2 to be precise) laying around that I would like to experiment and learn embedded Rust with.

I saw that the PR for the Cortex A working group only mentioned aarch64 while the A20 uses Cortex A7 cores which would be the armv7 target.

Is there any work happening/done for supporting bare metal armv7 yet? Is this something that I should even attempt to work on as someone new to embedded?

Thanks in advance!

[andre-richter]

This crate is a support crate (library). It currently only supports aarch64 cortex-a processors, and due to limited bandwidth on my side, no plans to add aarch32 support for now. Having such a support crate is only one part of the equation, though.

To actually compile for aarch32 bare-metal, you would first need to have a suitable target for cargo xbuild to use (--target). For aarch64, those are:

• aarch64-unknown-none
• aarch64-unknoen-none-softfloat

There is no bare-metal target for armv7 yet. There was an attempt (rust-lang/rust#60135), but it didn't make it upstream. However, for starters, you could use the targets in the PR to generate a custom target .json and use that (Example here: https://os.phil-opp.com/minimal-rust-kernel/#putting-it-together).

[RobertBuhren]

There is: https://github.com/rust-lang/rust/blob/master/src/librustc_target/spec/armv7r_none_eabi.rs

[andre-richter]

There is: https://github.com/rust-lang/rust/blob/master/src/librustc_target/spec/armv7r_none_eabi.rs

This would be a Cortex-R target.

[RobertBuhren]

IMHO there is not difference to Cortex-A regarding the toolchain. Both architectures are defined by the ARMv7-AR reference manual.

[andre-richter]

I faintly remember that one of the few differences is that the R profile doesn't have VMSA support?
Don't know if the llvm backend accounts for that, though.

So depending on if you're going to use that or not it might work.

[RobertBuhren]

Correct, it uses PMSA. But that shouldn't be relevant for the toolchain?

[raw-bin]

Hi. v8-R implements the AArch32 execution state. Also the A32 and T32 instruction sets. So it is similar to v8-A in that respect which is why at the Application level, toolchains targeting v8-A may be used for v8-R. At the system level things are somewhat different: v8-R only supports PMSA and introduces an optional EL2 (Hyp mode). From the PoV of the Cortex-A crate, I _think_ (needs verification) that the architectural system control register accessors should be common to both profiles. My suggestion would be to consider creating a WiP branch of the Cortex-A crate focused on exploring any modifications specific to v8-R. That way we can reason about the differences and consider whether it makes sense to continue with some conditional glue or consider another route. Robin

…

On Tue, Dec 10, 2019 at 2:25 PM Andre Richter ***@***.***> wrote: I faintly remember that one of the few differences is that the R profile doesn't have VMSA support? So depending on if you're going to use that or not it might work. — You are receiving this because you are subscribed to this thread. Reply to this email directly, view it on GitHub <#11?email_source=notifications&email_token=AAFMKYWRYU2OHAO2XBJHGVDQX6RHBA5CNFSM4JVF6MK2YY3PNVWWK3TUL52HS4DFVREXG43VMVBW63LNMVXHJKTDN5WW2ZLOORPWSZGOEGPNB4Q#issuecomment-564056306>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/AAFMKYXWFCYI5PAFCYU3UNTQX6RHBANCNFSM4JVF6MKQ> .

[andre-richter]

In summary, there's two things you need for bare-metal Cortex A7.

1. A compiler target for (bare-metal) AArch32.
   1. There's multiple ways to get there, for starters, I would suggest the --target json way from my first comment.
2. Once you have the target, you can use support crates like cortex-a to wrap the unsafe code.
   1. This repository currently only supports aarch64. aarch32 support is not on the roadmap, but we would accept PRs.

Hope that helps. I would close this issue if all your questions are answered. Is there anything open?

Thanks,
Andre

[RobertBuhren]

There is already a toolchain available for ARMv7: "armv7r_none_eabi.rs".
According to the name it is for ARMv7 Cortex-R cores, but afaik there is no difference in the toolchain compared to a toolchain for an ARMv7 Cortex-A.

So toolchain support is already there.

As for this issues, maybe it would help to clarify in the readme which "Cortex-A" CPU's are supported by this repo in the readme? "Cortex-A" can refer to both ARMv8 and ARMv7 CPU's.

Regards,

Robert

[andre-richter]

As for this issues, maybe it would help to clarify in the readme which "Cortex-A" CPU's are supported by this repo in the readme? "Cortex-A" can refer to both ARMv8 and ARMv7 CPU's.

Good point. I pushed 9ec8dd7

[UniqueActive]

Hey, sorry for my inactivity, have been very busy :) Thank you all for your input, I will try the things you suggested and see how far I get. If I get something to work, I will definitely let you know.

[andre-richter]

Thanks! Closing for now.

[mcdoll]

Shameless ad: I am writing stuff for the beaglebone, which is a 32bit Cortex-A SoC (armv7). If someone is interested in this, I can make the repos public, but the code is very experimental and I am not an comp-sci expert.

[UniqueActive]

Please do share, I guarantee I know even less and appreciate the example, even if it is not perfect :)