Open
Description
TrustZone in Armv8-m processors like the Cortex-M23 and Cortex-M33 supports a second 'secure' copy of registers like SysTick and VTOR. It also supports a second interrupt vector table.
I'd like to add support, but it should be behind a feature flag as not all Cortex-M23/33 implementations support Secure Mode.
References: