Fix Clippy git ref again #279
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279: Gate Bors on Clippy r=therealprof a=jonas-schievink Co-authored-by: Jonas Schievink <[email protected]>
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279: Add barriers after FPU enabling r=adamgreig a=thalesfragoso This only seems to be required for M7 cores, but since we can't know the specific core, we can't filter on that. I thought about using the SCB's `RegisterBlock` from cortex-m to enable the FPU, but the [registers](https://docs.rs/cortex-m/0.6.2/cortex_m/peripheral/scb/struct.RegisterBlock.html) are just the generics `RW` which isn't that different from what we're doing right now, and we would need `Peripherals::steal` to use the methods from SCB which would set the `CORE_PERIPHERALS`/`TAKEN` flag. And one question, with this change, can we get rid of the `trampoline()` function? I don't think the compiler will do reordering across foreign functions calls (dsb/isb), but I might be missing something. Co-authored-by: Thales Fragoso <[email protected]>
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