Description
Feature gate: #![feature(stdarch_x86_avx512)]
This is a tracking issue for the AVX-512 (and related extensions) intrinsics in core::arch
.
Public API
This feature covers all of the intrinsics from the following features:
avx512bf16
avx512bitalg
avx512bw
avx512cd
avx512f
avx512ifma
avx512vbmi
avx512vbmi2
avx512vnni
avx512vpopcntdq
gfni
vaes
vpclmulqdq
VEX variants
avxifma
avxneconvert
avxvnni
avxvnniint16
avxvnniint8
Implementation History
- Split the stdsimd feature into separate features stdarch#1486
- Implicitly enable evex512 if avx512 is enabled #121088
- Stop using the avx512er and avx512pf x86 target features #125498
- Expand
avx512_target_feature
to include VEX variants #126617
Steps
- Final comment period (FCP)1
- Stabilization PR
Unresolved Questions and Other Concerns
_mm512_reduce_add_ps and friends are setting fast-math flags they should not set stdarch#1533How will we handle AVX10?_mm512_shrdv_* intrinsics have incorrect argument order #130365- We need
i1xN
support to call LLVM intrinsics foravx512vp2intersect
.
Footnotes
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Category: An issue tracking the progress of sth. like the implementation of an RFC`#![feature(stdarch_x86_avx512)]`Target: x86 processors, 32 bit (like i686-*) (IA-32)Target: x86-64 processors (like x86_64-*) (also known as amd64 and x64)Relevant to the library API team, which will review and decide on the PR/issue.This issue / PR is in PFCP or FCP with a disposition to merge it.Proposed to merge/close by relevant subteam, see T-<team> label. Will enter FCP once signed off.