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Description
vld1x intrinsics are compiled to have alignment requirements, e.g. the assembly emitted for:
pub unsafe fn vld1_f32_x2(a: *const f32) -> float32x2x2_t { ... }
is
<stdarch_test_shim_vld1_f32_x2_vld1>:
f4200a9f vld1.32 {d0-d1}, [r0 :64]
e12fff1e bx lr
and requires a
to be 64-bit aligned (denoted by the :64
in the assembly). Clang does the same AFAICS.
Two problems:
- The alignment requirements are neither documented in Rust nor obvious and aarch64 has no such requirements.
- Our tests do not pass properly aligned pointers. Execution of the test suite on real arm hardware causes bus errors.
Possible solutions:
- Relax the alignment requirements at a slight general performance loss. Haven't checked if this can be done easily.
- Document and maybe assert the requirements and fix the tests.
cc @SparrowLii
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