`stdsimd` fails to build with `target_cpu=skylake-avx512`

[hdevalence]

When compiling stdsimd with rustc 1.22.0-nightly (b7960878b 2017-10-18) and -C target_cpu=skylake-avx512, the build fails:

$ RUSTFLAGS="-C target_cpu=skylake-avx512" cargo build --release
   Compiling stdsimd v0.0.2 (file:///<stripped>/stdsimd)
LLVM ERROR: Cannot select: t83: v32i16 = X86ISD::VINSERT t82, t78, Constant:i64<0>
  t82: v32i16 = bitcast t81
    t81: v16i32 = BUILD_VECTOR Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>
      t80: i32 = Constant<0>
      t80: i32 = Constant<0>
      t80: i32 = Constant<0>
      t80: i32 = Constant<0>
      t80: i32 = Constant<0>
      t80: i32 = Constant<0>
      t80: i32 = Constant<0>
      t80: i32 = Constant<0>
      t80: i32 = Constant<0>
      t80: i32 = Constant<0>
      t80: i32 = Constant<0>
      t80: i32 = Constant<0>
      t80: i32 = Constant<0>
      t80: i32 = Constant<0>
      t80: i32 = Constant<0>
      t80: i32 = Constant<0>
  t78: i16 = truncate t5
    t5: i64,ch = CopyFromReg t0, Register:i64 %vreg2
      t4: i64 = Register %vreg2
  t79: i64 = Constant<0>
In function: _ZN61_$LT$stdsimd..v512..u16x32$u20$as$u20$core..fmt..LowerHex$GT$3fmt17h59e1149cebeaa07fE
error: Could not compile `stdsimd`.

To learn more, run the command again with --verbose.

[hdevalence]

Discussion moved from comments here: #146 (comment) and here #146 (comment)

[hdevalence]

@alexcrichton re #146 (comment) , one motivation is to have SSE2/AVX2 code written using intrinsics be able to use the extra registers xmm16..xmm31, ymm16..ymm31 that AVX512VL provides. Is this possible using feature detection?

[alexcrichton]

Oh yeah definitely makes sense to fix this! I tested a snippet which I think may have been a reduction of this? It looks like this is fixed in LLVM 5 so this may be blocked on rust-lang/rust#43370

[hdevalence]

Building the branch mentioned in that issue and using that as the local Rust toolchain fixed the issue for me.

[hdevalence]

Update: using the current nightly Rust and the current stdsimd has stopped working on skylake-avx512.

[gnzlbg]

Does it work with a previous stdsimd version but the current nightly Rust?

Do you have a reproducer? Does it fail to compile, at run-time, etc?

---

EDIT: I get the following error:

RUSTFLAGS="-C target_cpu=skylake-avx512" cargo build --release
   Compiling coresimd v0.0.3 (file:///stdsimd/coresimd)
LLVM ERROR: Cannot select: 0x1194d1680: v32i16 = X86ISD::VINSERT 0x120351680, 0x12df5d5b0, Constant:i64<0>
  0x120351680: v32i16 = bitcast 0x1203eeb60
    0x1203eeb60: v16i32 = BUILD_VECTOR Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>
      0x1194d3680: i32 = Constant<0>
      0x1194d3680: i32 = Constant<0>
      0x1194d3680: i32 = Constant<0>
      0x1194d3680: i32 = Constant<0>
      0x1194d3680: i32 = Constant<0>
      0x1194d3680: i32 = Constant<0>
      0x1194d3680: i32 = Constant<0>
      0x1194d3680: i32 = Constant<0>
      0x1194d3680: i32 = Constant<0>
      0x1194d3680: i32 = Constant<0>
      0x1194d3680: i32 = Constant<0>
      0x1194d3680: i32 = Constant<0>
      0x1194d3680: i32 = Constant<0>
      0x1194d3680: i32 = Constant<0>
      0x1194d3680: i32 = Constant<0>
      0x1194d3680: i32 = Constant<0>
  0x12df5d5b0: i16 = truncate 0x1194d3f70
    0x1194d3f70: i64,ch = CopyFromReg 0x12df0c730, Register:i64 %vreg2
      0x1194d56e8: i64 = Register %vreg2
  0x1194d5478: i64 = Constant<0>
In function: _ZN62_$LT$coresimd..v512..u16x32$u20$as$u20$core..fmt..LowerHex$GT$3fmt17h0a46f3602aaf0609E
error: Could not compile `coresimd`.

To learn more, run the command again with --verbose.

[hdevalence]

Oops, sorry, I missed this. I guess you reproduced it; my test case is this AVX2 code: https://github.com/isislovecruft/curve25519-dalek/pull/94

It doesn't use any 512-bit vectors, but there's a mild performance increase when using AVX512VL since the increase in registers avoids spills.

[gnzlbg]

I’ll try to add a build bot that checks this.

…

On Fri 15. Dec 2017 at 20:36, Henry de Valence ***@***.***> wrote: Oops, sorry, I missed this. I guess you reproduced it; my test case is this AVX2 code: isislovecruft/curve25519-dalek#94 <https://github.com/isislovecruft/curve25519-dalek/pull/94> It doesn't use any 512-bit vectors, but there's a mild performance increase when using AVX512VL since the increase in registers avoids spills. — You are receiving this because you commented. Reply to this email directly, view it on GitHub <#157 (comment)>, or mute the thread <https://github.com/notifications/unsubscribe-auth/AA3NpiCq2PRUCr26oMQG2ZbO9Tbype88ks5tAsoegaJpZM4QJWni> .