[lldb][LoongArch64] Add support for LoongArch64 in elf-core for lldb #112296

lawn123 · 2024-10-15T03:20:08Z

When using the lldb command 'target create --core' on the LoongArch64 architecture, this part of the code is required.

github-actions · 2024-10-15T03:20:25Z

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llvmbot · 2024-10-15T03:20:57Z

@llvm/pr-subscribers-lldb

Author: Liu An (lawn123)

Changes

When using the lldb command 'target create -- core' on the LoongArch64 architecture, this part of the code is required.

Full diff: https://github.com/llvm/llvm-project/pull/112296.diff

4 Files Affected:

(modified) lldb/source/Plugins/Process/elf-core/CMakeLists.txt (+1)
(added) lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp (+87)
(added) lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h (+62)
(modified) lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp (+6)

diff --git a/lldb/source/Plugins/Process/elf-core/CMakeLists.txt b/lldb/source/Plugins/Process/elf-core/CMakeLists.txt
index 72925c835b5c89..7473fa8d41ccb3 100644
--- a/lldb/source/Plugins/Process/elf-core/CMakeLists.txt
+++ b/lldb/source/Plugins/Process/elf-core/CMakeLists.txt
@@ -10,6 +10,7 @@ add_lldb_library(lldbPluginProcessElfCore PLUGIN
   RegisterContextPOSIXCore_s390x.cpp
   RegisterContextPOSIXCore_x86_64.cpp
   RegisterContextPOSIXCore_riscv64.cpp
+  RegisterContextPOSIXCore_loongarch64.cpp
   RegisterUtilities.cpp
 
   LINK_LIBS
diff --git a/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp b/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp
new file mode 100644
index 00000000000000..af192ecbe01e1b
--- /dev/null
+++ b/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp
@@ -0,0 +1,87 @@
+//===-- RegisterContextPOSIXCore_loongarch64.cpp
+//------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "RegisterContextPOSIXCore_loongarch64.h"
+
+#include "lldb/Utility/DataBufferHeap.h"
+
+using namespace lldb_private;
+
+std::unique_ptr<RegisterContextCorePOSIX_loongarch64>
+RegisterContextCorePOSIX_loongarch64::Create(Thread &thread,
+                                             const ArchSpec &arch,
+                                             const DataExtractor &gpregset,
+                                             llvm::ArrayRef<CoreNote> notes) {
+  return std::unique_ptr<RegisterContextCorePOSIX_loongarch64>(
+      new RegisterContextCorePOSIX_loongarch64(
+          thread,
+          std::make_unique<RegisterInfoPOSIX_loongarch64>(arch, Flags()),
+          gpregset, notes));
+}
+
+RegisterContextCorePOSIX_loongarch64::RegisterContextCorePOSIX_loongarch64(
+    Thread &thread,
+    std::unique_ptr<RegisterInfoPOSIX_loongarch64> register_info,
+    const DataExtractor &gpregset, llvm::ArrayRef<CoreNote> notes)
+    : RegisterContextPOSIX_loongarch64(thread, std::move(register_info)) {
+
+  m_gpr_buffer = std::make_shared<DataBufferHeap>(gpregset.GetDataStart(),
+                                                  gpregset.GetByteSize());
+  m_gpr.SetData(m_gpr_buffer);
+  m_gpr.SetByteOrder(gpregset.GetByteOrder());
+
+  ArchSpec arch = m_register_info_up->GetTargetArchitecture();
+  DataExtractor fpregset = getRegset(notes, arch.GetTriple(), FPR_Desc);
+  m_fpr_buffer = std::make_shared<DataBufferHeap>(fpregset.GetDataStart(),
+                                                  fpregset.GetByteSize());
+  m_fpr.SetData(m_fpr_buffer);
+  m_fpr.SetByteOrder(fpregset.GetByteOrder());
+}
+
+RegisterContextCorePOSIX_loongarch64::~RegisterContextCorePOSIX_loongarch64() =
+    default;
+
+bool RegisterContextCorePOSIX_loongarch64::ReadGPR() { return true; }
+
+bool RegisterContextCorePOSIX_loongarch64::ReadFPR() { return true; }
+
+bool RegisterContextCorePOSIX_loongarch64::WriteGPR() {
+  assert(false && "Writing registers is not allowed for core dumps");
+  return false;
+}
+
+bool RegisterContextCorePOSIX_loongarch64::WriteFPR() {
+  assert(false && "Writing registers is not allowed for core dumps");
+  return false;
+}
+
+bool RegisterContextCorePOSIX_loongarch64::ReadRegister(
+    const RegisterInfo *reg_info, RegisterValue &value) {
+  const uint8_t *src = nullptr;
+  lldb::offset_t offset = reg_info->byte_offset;
+
+  if (IsGPR(reg_info->kinds[lldb::eRegisterKindLLDB])) {
+    src = m_gpr.GetDataStart();
+  } else if (IsFPR(reg_info->kinds[lldb::eRegisterKindLLDB])) {
+    src = m_fpr.GetDataStart();
+    offset -= GetGPRSize();
+  } else {
+    return false;
+  }
+
+  Status error;
+  value.SetFromMemoryData(*reg_info, src + offset, reg_info->byte_size,
+                          lldb::eByteOrderLittle, error);
+  return error.Success();
+}
+
+bool RegisterContextCorePOSIX_loongarch64::WriteRegister(
+    const RegisterInfo *reg_info, const RegisterValue &value) {
+  return false;
+}
diff --git a/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h b/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h
new file mode 100644
index 00000000000000..44ee44badc5961
--- /dev/null
+++ b/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h
@@ -0,0 +1,62 @@
+//===-- RegisterContextPOSIXCore_loongarch64.h ----------------------*- C++
+//-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLDB_SOURCE_PLUGINS_PROCESS_ELF_CORE_REGISTERCONTEXTPOSIXCORE_LOONGARCH64_H
+#define LLDB_SOURCE_PLUGINS_PROCESS_ELF_CORE_REGISTERCONTEXTPOSIXCORE_LOONGARCH64_H
+
+#include "Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h"
+#include "Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h"
+
+#include "Plugins/Process/elf-core/RegisterUtilities.h"
+#include "lldb/Target/Thread.h"
+#include "lldb/Utility/DataExtractor.h"
+#include "lldb/Utility/RegisterValue.h"
+
+#include <memory>
+
+class RegisterContextCorePOSIX_loongarch64
+    : public RegisterContextPOSIX_loongarch64 {
+public:
+  static std::unique_ptr<RegisterContextCorePOSIX_loongarch64>
+  Create(lldb_private::Thread &thread, const lldb_private::ArchSpec &arch,
+         const lldb_private::DataExtractor &gpregset,
+         llvm::ArrayRef<lldb_private::CoreNote> notes);
+
+  ~RegisterContextCorePOSIX_loongarch64() override;
+
+  bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
+                    lldb_private::RegisterValue &value) override;
+
+  bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
+                     const lldb_private::RegisterValue &value) override;
+
+protected:
+  RegisterContextCorePOSIX_loongarch64(
+      lldb_private::Thread &thread,
+      std::unique_ptr<RegisterInfoPOSIX_loongarch64> register_info,
+      const lldb_private::DataExtractor &gpregset,
+      llvm::ArrayRef<lldb_private::CoreNote> notes);
+
+  bool ReadGPR() override;
+
+  bool ReadFPR() override;
+
+  bool WriteGPR() override;
+
+  bool WriteFPR() override;
+
+private:
+  lldb::DataBufferSP m_gpr_buffer;
+  lldb::DataBufferSP m_fpr_buffer;
+
+  lldb_private::DataExtractor m_gpr;
+  lldb_private::DataExtractor m_fpr;
+};
+
+#endif // LLDB_SOURCE_PLUGINS_PROCESS_ELF_CORE_REGISTERCONTEXTPOSIXCORE_LOONGARCH64_H
diff --git a/lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp b/lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp
index 52b96052bdbeca..f2838087298efb 100644
--- a/lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp
+++ b/lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp
@@ -33,6 +33,7 @@
 #include "RegisterContextLinuxCore_x86_64.h"
 #include "RegisterContextPOSIXCore_arm.h"
 #include "RegisterContextPOSIXCore_arm64.h"
+#include "RegisterContextPOSIXCore_loongarch64.h"
 #include "RegisterContextPOSIXCore_mips64.h"
 #include "RegisterContextPOSIXCore_powerpc.h"
 #include "RegisterContextPOSIXCore_ppc64le.h"
@@ -171,6 +172,7 @@ ThreadElfCore::CreateRegisterContextForFrame(StackFrame *frame) {
 
     if (!reg_interface && arch.GetMachine() != llvm::Triple::aarch64 &&
         arch.GetMachine() != llvm::Triple::arm &&
+        arch.GetMachine() != llvm::Triple::loongarch64 &&
         arch.GetMachine() != llvm::Triple::riscv64) {
       LLDB_LOGF(log, "elf-core::%s:: Architecture(%d) or OS(%d) not supported",
                 __FUNCTION__, arch.GetMachine(), arch.GetTriple().getOS());
@@ -187,6 +189,10 @@ ThreadElfCore::CreateRegisterContextForFrame(StackFrame *frame) {
           *this, std::make_unique<RegisterInfoPOSIX_arm>(arch), m_gpregset_data,
           m_notes);
       break;
+    case llvm::Triple::loongarch64:
+      m_thread_reg_ctx_sp = RegisterContextCorePOSIX_loongarch64::Create(
+          *this, arch, m_gpregset_data, m_notes);
+      break;
     case llvm::Triple::riscv64:
       m_thread_reg_ctx_sp = RegisterContextCorePOSIX_riscv64::Create(
           *this, arch, m_gpregset_data, m_notes);

lawn123 · 2024-10-15T03:23:13Z

@shushanhf

shushanhf · 2024-10-15T03:27:37Z

@shushanhf

@SixWeining

SixWeining

@wangleiat may take a look.

SixWeining · 2024-10-15T05:08:41Z

lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp

@@ -0,0 +1,87 @@
+//===-- RegisterContextPOSIXCore_loongarch64.cpp
+//------------------------------===//


SixWeining · 2024-10-15T05:09:10Z

lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h

@@ -0,0 +1,62 @@
+//===-- RegisterContextPOSIXCore_loongarch64.h ----------------------*- C++
+//-*-===//


SixWeining · 2024-10-15T09:47:33Z

When using the lldb command 'target create -- core' on the LoongArch64 architecture, this part of the code is required.

Do you mean --core but not -- core?

lawn123 · 2024-10-15T10:00:52Z

When using the lldb command 'target create -- core' on the LoongArch64 architecture, this part of the code is required.

Do you mean --core but not -- core?

Yes. use ' target create --core' to load dump files

DavidSpickett · 2024-10-15T12:29:20Z

I don't see any tests yet, I think lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py will be the place for those. There is a template program file you can use in that folder.

If you need more functionality to get to the point you can add tests, please add that to this PR or explain your plan for getting to a point where testing is possible (I'm not aware of the current status of LoongArch in LLDB).

SixWeining · 2024-10-15T13:38:16Z

lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h

+  bool WriteFPR() override;
+
+private:
+  lldb::DataBufferSP m_gpr_buffer;


Seems we only need to define them as local variables before using it. No need to be class-member-variables.

SixWeining · 2024-10-16T08:17:40Z

Seems we the same GetRegisterSetCount misprint issue as #93297.

lawn123 · 2024-10-17T08:46:17Z

I don't see any tests yet, I think lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py will be the place for those. There is a template program file you can use in that folder.
@DavidSpickett @SixWeining I have added two test cases to TestLinuxCore. py and modified the format as well as the issue with GetRegisterSetCount

SixWeining · 2024-10-17T09:23:16Z

lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py

+        fpr_values["fcc3"] = "0x01"
+        fpr_values["fcc4"] = "0x01"
+        fpr_values["fcc5"] = "0x01"
+        fpr_values["fcc6"] = "0x0"


SixWeining · 2024-10-17T09:23:19Z

lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py

+        fpr_values["f30"] = "0xffffffffffffffff"
+        fpr_values["f31"] = "0xffffffffffffffff"
+        fpr_values["fcc0"] = "0x01"
+        fpr_values["fcc1"] = "0x0"


Should it be 0x00? Otherwise 0x01 can also match the expect.

SixWeining · 2024-10-17T09:23:29Z

lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py

+        fpr_values["fcc5"] = "0x01"
+        fpr_values["fcc6"] = "0x0"
+        fpr_values["fcc7"] = "0x01"
+        fpr_values["fcsr"] = "0x0"


0x00000000

Other formatting issues have been corrected. Here, only 0x01 and 0x00 are allowed. Otherwise, the test will not pass

SixWeining · 2024-10-17T09:26:14Z

lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py

+        values["r11"] = "0x00000000000000dd"
+        values["r12"] = "0x0"
+        values["r13"] = "0x000000000000002f"
+        values["r14"] = "0x0"


Should we use full encoding (i.e. 8bytes)?

SixWeining · 2024-10-17T09:29:09Z

lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp

@@ -0,0 +1,84 @@
+//===-- RegisterContextPOSIXCore_loongarch64.cpp ------------------------------===//


Generally one line has 80 characters at most.

SixWeining · 2024-10-17T09:37:02Z

I'm not aware of the current status of LoongArch in LLDB

@DavidSpickett General debugging commands can be used on LoongArch with some known issues to be addressed. Here is a summary #109394.

For this PR, I have checked locally. I can confirm core dump file could be debugged with this change.

DavidSpickett · 2024-10-17T10:08:36Z

lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py

@@ -833,6 +845,107 @@ def test_riscv64_regs_gpr_only(self):
            substrs=["registers were unavailable"],
        )

+    @skipIfLLVMTargetMissing("LoongArch")
+    def test_loongarch64_regs(self):
+        # check registers using 64 bit LoongArch64 core file containing GP-registers only


Maybe this is a terminology difference. To me GP register would mean "general purpose" and not include floating point registers. But perhaps you always have an FPU so they are kinda general in that they always exist.

I'd just change it to "GP and FP registers" to prevent any confusion.

There is confusion, I will revise it later.

lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py

DavidSpickett · 2024-10-17T10:10:04Z

lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py

+        fpr_values["fcc5"] = "0x01"
+        fpr_values["fcc6"] = "0x00"
+        fpr_values["fcc7"] = "0x01"
+        fpr_values["fcsr"] = "0x00"


Are these 8 bit registers?

fcc* is 8 bit . fcsr is 4 byte.

SixWeining · 2024-10-17T10:10:24Z

lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py

+        fpr_values["fcc5"] = "0x01"
+        fpr_values["fcc6"] = "0x00"
+        fpr_values["fcc7"] = "0x01"
+        fpr_values["fcsr"] = "0x00"


Not like fcc registers, fcsr is 32bit.

(lldb) register read fcsr fcsr = 0x00000000

DavidSpickett · 2024-10-17T10:13:56Z

@DavidSpickett General debugging commands can be used on LoongArch with some known issues to be addressed. Here is a summary #109394.

For RISC-V I have been using #55383 as the tracking issue for overall support. If you want to, you could open a similar issue and write out what currently works, and I'll link to it from the main lldb page. Not a requirement, just if you have the time.

github-actions · 2024-10-17T10:17:39Z

✅ With the latest revision this PR passed the Python code formatter.

github-actions · 2024-10-17T10:17:39Z

✅ With the latest revision this PR passed the C/C++ code formatter.

lldb/test/API/functionalities/postmortem/elf-core/linux-loongarch64.core

SixWeining · 2024-10-17T11:39:00Z

For RISC-V I have been using #55383 as the tracking issue for overall support. If you want to, you could open a similar issue and write out what currently works, and I'll link to it from the main lldb page. Not a requirement, just if you have the time.

Thanks. I just filed #112693.

DavidSpickett · 2024-10-17T13:56:16Z

Not sure what's going on with the register formatting. It might be that because we do a substring comparison, foo = 0x00 is found in foo = 0x00000000.

So I would recommend loading the core file manually and just copying whatever register read shows. If the formatting is still off, potentially you need to update the register sizes or formatting style, but I don't think you need to do that in this PR. It can be a follow up to do just that.

Other than that I don't have any objections here, seems like @SixWeining is the architecture expert so they can give the final approval.

SixWeining

Looks good to me once the code_formatter CI fail and fcsr format issues are addressed.

SixWeining · 2024-10-21T04:00:31Z

lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py

+        fpr_values["fcc5"] = "0x01"
+        fpr_values["fcc6"] = "0x00"
+        fpr_values["fcc7"] = "0x01"
+        fpr_values["fcsr"] = "0x0000"


(lldb) register read fcsr
fcsr = 0x00000000

lawn123 · 2024-10-21T07:47:13Z

@DavidSpickett @SixWeining I have fix CI fail and fcsr format issues

SixWeining

LGTM and thanks!

github-actions · 2024-10-21T09:05:15Z

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[LoongArch64]: Add support for LoongArch64 in elf-core for lldb

ba485de

lawn123 requested a review from JDevlieghere as a code owner October 15, 2024 03:20

llvmbot added the lldb label Oct 15, 2024

SixWeining reviewed Oct 15, 2024

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DavidSpickett changed the title ~~[LoongArch64]: Add support for LoongArch64 in elf-core for lldb~~ [lldb][LoongArch64] Add support for LoongArch64 in elf-core for lldb Oct 15, 2024

SixWeining reviewed Oct 15, 2024

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SixWeining mentioned this pull request Oct 16, 2024

LoongArch: function calls support in lldb expressions #109394

Closed

Fix formatting and add two testcases in TestLinuxCore.py

355442e

SixWeining reviewed Oct 17, 2024

View reviewed changes

Fix format

2cce5e7

DavidSpickett reviewed Oct 17, 2024

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SixWeining reviewed Oct 17, 2024

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DavidSpickett reviewed Oct 17, 2024

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lldb/test/API/functionalities/postmortem/elf-core/linux-loongarch64.core Outdated Show resolved Hide resolved

Fix format and reduce the size of the core file

bd8409d

SixWeining reviewed Oct 21, 2024

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Fix CI fail and fcsr format issues

884a82d

SixWeining approved these changes Oct 21, 2024

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DavidSpickett merged commit 911a6f2 into llvm:main Oct 21, 2024
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lawn123 deleted the loongarch_lldb branch October 23, 2024 07:59

SixWeining mentioned this pull request Nov 1, 2024

LLDB LoongArch support #112693

Open

7 tasks

		@@ -0,0 +1,87 @@
		//===-- RegisterContextPOSIXCore_loongarch64.cpp
		//------------------------------===//

		@@ -0,0 +1,62 @@
		//===-- RegisterContextPOSIXCore_loongarch64.h ----------------------*- C++
		//-*-===//

		@@ -0,0 +1,84 @@
		//===-- RegisterContextPOSIXCore_loongarch64.cpp ------------------------------===//

[lldb][LoongArch64] Add support for LoongArch64 in elf-core for lldb #112296

[lldb][LoongArch64] Add support for LoongArch64 in elf-core for lldb #112296

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