AMDGPU: Handle cvt_scale F32/F16->F4/F8 gfx950 hazard #117844
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This was referenced Nov 27, 2024
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This was referenced Nov 27, 2024
This was referenced Nov 27, 2024
This was referenced Nov 27, 2024
shiltian
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gfx950 SP changes doc says: No 4 clk forwarding on opcodes that convert from F32/F16->F8 or F32/F16->F4. Must insert a NOP or instruction writing some other destination VREG after a conversion to F4/F8 since it writes either low/high half or bytes. Co-authored-by: Pravin Jagtap <[email protected]> Co-authored-by: Jeffrey Byrnes <[email protected]>
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LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/171/builds/11404 Here is the relevant piece of the build log for the reference |
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gfx950 SP changes doc says: No 4 clk forwarding on opcodes that convert from F32/F16->F8 or F32/F16->F4. Must insert a NOP or instruction writing some other destination VREG after a conversion to F4/F8 since it writes either low/high half or bytes. Co-authored-by: Pravin Jagtap <[email protected]> Co-authored-by: Jeffrey Byrnes <[email protected]>
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gfx950 SP changes doc says:
No 4 clk forwarding on opcodes that convert from
F32/F16->F8 or F32/F16->F4. Must insert a NOP or
instruction writing some other destination VREG
after a conversion to F4/F8 since it writes either
low/high half or bytes.
Co-authored-by: Pravin Jagtap [email protected]
Co-authored-by: Jeffrey Byrnes [email protected]