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[M68k] Emit RTE for interrupt handler. #72787
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@llvm/pr-subscribers-backend-m68k Author: Sheng (0x59616e) ChangesFixes #64833 Full diff: https://github.com/llvm/llvm-project/pull/72787.diff 3 Files Affected:
diff --git a/llvm/lib/Target/M68k/M68kExpandPseudo.cpp b/llvm/lib/Target/M68k/M68kExpandPseudo.cpp
index 13268d754a9dde6..7bd3821077737ea 100644
--- a/llvm/lib/Target/M68k/M68kExpandPseudo.cpp
+++ b/llvm/lib/Target/M68k/M68kExpandPseudo.cpp
@@ -252,12 +252,11 @@ bool M68kExpandPseudo::ExpandMI(MachineBasicBlock &MBB,
return true;
}
case M68k::RET: {
- // Adjust stack to erase error code
- int64_t StackAdj = MBBI->getOperand(0).getImm();
- MachineInstrBuilder MIB;
-
- if (StackAdj == 0) {
- MIB = BuildMI(MBB, MBBI, DL, TII->get(M68k::RTS));
+ if (MBB.getParent()->getFunction().getCallingConv() ==
+ CallingConv::M68k_INTR) {
+ BuildMI(MBB, MBBI, DL, TII->get(M68k::RTE));
+ } else if (int64_t StackAdj = MBBI->getOperand(0).getImm(); StackAdj == 0) {
+ BuildMI(MBB, MBBI, DL, TII->get(M68k::RTS));
} else {
// Copy return address from stack to a free address(A0 or A1) register
// TODO check if pseudo expand uses free address register
diff --git a/llvm/lib/Target/M68k/M68kInstrControl.td b/llvm/lib/Target/M68k/M68kInstrControl.td
index 225f932f3316691..6e116d7cfe40193 100644
--- a/llvm/lib/Target/M68k/M68kInstrControl.td
+++ b/llvm/lib/Target/M68k/M68kInstrControl.td
@@ -327,6 +327,10 @@ def RTS : MxInst<(outs), (ins), "rts", []> {
let Inst = (descend 0b0100, 0b1110, 0b0111, 0b0101);
}
+def RTE: MxInst<(outs), (ins), "rte", []> {
+ let Inst = (descend 0b0100, 0b1110, 0b0111, 0b0011);
+}
+
let isCodeGenOnly = 1 in
def RET : MxPseudo<(outs), (ins i32imm:$adj, variable_ops),
[(MxRet timm:$adj)]>;
diff --git a/llvm/test/CodeGen/M68k/CConv/rte.ll b/llvm/test/CodeGen/M68k/CConv/rte.ll
new file mode 100644
index 000000000000000..da7eb1bdc70e772
--- /dev/null
+++ b/llvm/test/CodeGen/M68k/CConv/rte.ll
@@ -0,0 +1,11 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
+; RUN: llc -mtriple m68k -o - %s | FileCheck %s
+
+define cc101 void @interrupt_handler() {
+; CHECK-LABEL: interrupt_handler:
+; CHECK: .cfi_startproc
+; CHECK-NEXT: ; %bb.0: ; %entry
+; CHECK-NEXT: rte
+entry:
+ ret void
+}
|
CC @thankfulmachine You may want to test this patch whether it addresses the original issue. |
@mshockwave Any comment? I will test the changes later. |
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LGTM thanks for fixing this!
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3 | ||
; RUN: llc -mtriple m68k -o - %s | FileCheck %s | ||
|
||
define cc101 void @interrupt_handler() { |
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just a note for future us: we should probably give this CC a more descriptive name.
if (MBB.getParent()->getFunction().getCallingConv() == | ||
CallingConv::M68k_INTR) { | ||
BuildMI(MBB, MBBI, DL, TII->get(M68k::RTE)); | ||
} else if (int64_t StackAdj = MBBI->getOperand(0).getImm(); StackAdj == 0) { |
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Why not just } else if (MBBI->getOperand(0).getImm() == 0) {
?
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Oh, such a blunder.
Fixes #64833