[ARM] Introduce the v9.5-A architecture version to Arm targets #78994
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This introduces the Armv9.5-A architecture version to the Arm backend, following on from the existing implementation for AArch64 targets. Mode details about the Armv9.5-A architecture version can be found at: * https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/arm-a-profile-architecture-developments-2023 * https://developer.arm.com/documentation/ddi0602/2023-09/
llvmbot
added
clang
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@llvm/pr-subscribers-clang-driver Author: Lucas Duarte Prates (pratlucas) ChangesThis introduces the Armv9.5-A architecture version to the Arm backend, Mode details about the Armv9.5-A architecture version can be found at:
Full diff: https://github.com/llvm/llvm-project/pull/78994.diff 11 Files Affected:
diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp
index a72bd42bad4157..55b71557452fa0 100644
--- a/clang/lib/Basic/Targets/ARM.cpp
+++ b/clang/lib/Basic/Targets/ARM.cpp
@@ -227,6 +227,8 @@ StringRef ARMTargetInfo::getCPUAttr() const {
return "9_3A";
case llvm::ARM::ArchKind::ARMV9_4A:
return "9_4A";
+ case llvm::ARM::ArchKind::ARMV9_5A:
+ return "9_5A";
case llvm::ARM::ArchKind::ARMV8MBaseline:
return "8M_BASE";
case llvm::ARM::ArchKind::ARMV8MMainline:
@@ -889,6 +891,7 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts,
case llvm::ARM::ArchKind::ARMV9_2A:
case llvm::ARM::ArchKind::ARMV9_3A:
case llvm::ARM::ArchKind::ARMV9_4A:
+ case llvm::ARM::ArchKind::ARMV9_5A:
// Filter __arm_cdp, __arm_ldcl, __arm_stcl in arm_acle.h
FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B3;
break;
@@ -1057,6 +1060,7 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts,
case llvm::ARM::ArchKind::ARMV9_2A:
case llvm::ARM::ArchKind::ARMV9_3A:
case llvm::ARM::ArchKind::ARMV9_4A:
+ case llvm::ARM::ArchKind::ARMV9_5A:
getTargetDefinesARMV83A(Opts, Builder);
break;
}
diff --git a/clang/test/CodeGen/arm-acle-coproc.c b/clang/test/CodeGen/arm-acle-coproc.c
index cf87130932edfe..0354d1297ece18 100644
--- a/clang/test/CodeGen/arm-acle-coproc.c
+++ b/clang/test/CodeGen/arm-acle-coproc.c
@@ -24,6 +24,7 @@
// RUN: %clang_cc1 -triple armv9.2a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple armv9.3a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple armv9.4a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple armv9.5a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple thumbv4 %s -E -dD -o - | FileCheck --check-prefix=CHECK-V4-THUMB %s
// RUN: %clang_cc1 -triple thumbv4t %s -E -dD -o - | FileCheck --check-prefix=CHECK-V4-THUMB %s
// RUN: %clang_cc1 -triple thumbv5 %s -E -dD -o - | FileCheck --check-prefix=CHECK-V5-THUMB %s
@@ -52,6 +53,7 @@
// RUN: %clang_cc1 -triple thumbv9.2a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple thumbv9.3a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple thumbv9.4a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple thumbv9.5a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple thumbv8m.base %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8-BASE %s
// RUN: %clang_cc1 -triple thumbv8m.main %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8-MAIN %s
// RUN: %clang_cc1 -triple thumbv8.1m.main %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8-MAIN %s
diff --git a/clang/test/Driver/arm-cortex-cpus-1.c b/clang/test/Driver/arm-cortex-cpus-1.c
index 2f300efee75ed4..25abbe1e3a8ad7 100644
--- a/clang/test/Driver/arm-cortex-cpus-1.c
+++ b/clang/test/Driver/arm-cortex-cpus-1.c
@@ -478,3 +478,20 @@
// RUN: %clang -target arm -march=armebv9.4a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V94A %s
// RUN: %clang -target arm -march=armebv9.4-a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V94A %s
// CHECK-BE-V94A: "-cc1"{{.*}} "-triple" "armebv9.4{{.*}}" "-target-cpu" "generic"
+
+// RUN: %clang -target armv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
+// RUN: %clang -target arm -march=armv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
+// RUN: %clang -target arm -march=armv9.5-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
+// RUN: %clang -target arm -march=armv9.5a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
+// RUN: %clang -target armv9.5a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
+// RUN: %clang -target arm -march=armv9.5a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
+// RUN: %clang -target arm -mlittle-endian -march=armv9.5-a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
+// CHECK-V95A: "-cc1"{{.*}} "-triple" "armv9.5{{.*}}" "-target-cpu" "generic"
+
+// RUN: %clang -target armebv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
+// RUN: %clang -target armv9.5a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
+// RUN: %clang -target armeb -march=armebv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
+// RUN: %clang -target armeb -march=armebv9.5-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
+// RUN: %clang -target arm -march=armebv9.5a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
+// RUN: %clang -target arm -march=armebv9.5-a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
+// CHECK-BE-V95A: "-cc1"{{.*}} "-triple" "armebv9.5{{.*}}" "-target-cpu" "generic"
diff --git a/clang/test/Preprocessor/arm-target-features.c b/clang/test/Preprocessor/arm-target-features.c
index 1539d03a044fa1..236c9f2479b705 100644
--- a/clang/test/Preprocessor/arm-target-features.c
+++ b/clang/test/Preprocessor/arm-target-features.c
@@ -897,6 +897,11 @@
// CHECK-V94A: #define __ARM_ARCH_9_4A__ 1
// CHECK-V94A: #define __ARM_ARCH_PROFILE 'A'
+// RUN: %clang -target armv9.5a-none-none-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V95A %s
+// CHECK-V95A: #define __ARM_ARCH 9
+// CHECK-V95A: #define __ARM_ARCH_9_5A__ 1
+// CHECK-V95A: #define __ARM_ARCH_PROFILE 'A'
+
// RUN: %clang -target arm-none-none-eabi -march=armv7-m -mfpu=softvfp -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SOFTVFP %s
// CHECK-SOFTVFP-NOT: #define __ARM_FP 0x
diff --git a/llvm/include/llvm/TargetParser/ARMTargetParser.def b/llvm/include/llvm/TargetParser/ARMTargetParser.def
index c520ab898cb90a..1797a1b238d349 100644
--- a/llvm/include/llvm/TargetParser/ARMTargetParser.def
+++ b/llvm/include/llvm/TargetParser/ARMTargetParser.def
@@ -151,6 +151,11 @@ ARM_ARCH("armv9.4-a", ARMV9_4A, "9.4-A", "+v9.4a",
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM))
+ARM_ARCH("armv9.5-a", ARMV9_5A, "9.5-A", "+v9.5a",
+ ARMBuildAttrs::CPUArch::v9_A, FK_NEON_FP_ARMV8,
+ (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
+ ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
+ ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM))
ARM_ARCH("armv8-r", ARMV8R, "8-R", "+v8r", ARMBuildAttrs::CPUArch::v8_R,
FK_NEON_FP_ARMV8,
(ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB |
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td
index 97d1444a553eb1..d68a6847b38202 100644
--- a/llvm/lib/Target/ARM/ARM.td
+++ b/llvm/lib/Target/ARM/ARM.td
@@ -704,6 +704,10 @@ def HasV9_4aOps : SubtargetFeature<"v9.4a", "HasV9_4aOps", "true",
"Support ARM v9.4a instructions",
[HasV8_9aOps, HasV9_3aOps]>;
+def HasV9_5aOps : SubtargetFeature<"v9.5a", "HasV9_5aOps", "true",
+ "Support ARM v9.5a instructions",
+ [HasV9_4aOps]>;
+
def HasV8_1MMainlineOps : SubtargetFeature<
"v8.1m.main", "HasV8_1MMainlineOps", "true",
"Support ARM v8-1M Mainline instructions",
@@ -1139,6 +1143,18 @@ def ARMv94a : Architecture<"armv9.4-a", "ARMv94a", [HasV9_4aOps,
FeatureCRC,
FeatureRAS,
FeatureDotProd]>;
+def ARMv95a : Architecture<"armv9.5-a", "ARMv95a", [HasV9_5aOps,
+ FeatureAClass,
+ FeatureDB,
+ FeatureFPARMv8,
+ FeatureNEON,
+ FeatureDSP,
+ FeatureTrustZone,
+ FeatureMP,
+ FeatureVirtualization,
+ FeatureCRC,
+ FeatureRAS,
+ FeatureDotProd]>;
def ARMv8r : Architecture<"armv8-r", "ARMv8r", [HasV8Ops,
FeatureRClass,
diff --git a/llvm/lib/Target/ARM/ARMSubtarget.h b/llvm/lib/Target/ARM/ARMSubtarget.h
index 43b4123a1b5571..91f3978b041a3a 100644
--- a/llvm/lib/Target/ARM/ARMSubtarget.h
+++ b/llvm/lib/Target/ARM/ARMSubtarget.h
@@ -132,6 +132,7 @@ class ARMSubtarget : public ARMGenSubtargetInfo {
ARMv92a,
ARMv93a,
ARMv94a,
+ ARMv95a,
};
public:
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
index 9c9af6068079d3..1d80af590d16e0 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
@@ -898,6 +898,7 @@ void ARMTargetELFStreamer::emitArchDefaultAttributes() {
case ARM::ArchKind::ARMV9_2A:
case ARM::ArchKind::ARMV9_3A:
case ARM::ArchKind::ARMV9_4A:
+ case ARM::ArchKind::ARMV9_5A:
S.setAttributeItem(CPU_arch_profile, ApplicationProfile, false);
S.setAttributeItem(ARM_ISA_use, Allowed, false);
S.setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
diff --git a/llvm/lib/TargetParser/ARMTargetParser.cpp b/llvm/lib/TargetParser/ARMTargetParser.cpp
index c470a1321fcbdc..67f937ebc33f9f 100644
--- a/llvm/lib/TargetParser/ARMTargetParser.cpp
+++ b/llvm/lib/TargetParser/ARMTargetParser.cpp
@@ -86,6 +86,7 @@ unsigned ARM::parseArchVersion(StringRef Arch) {
case ArchKind::ARMV9_2A:
case ArchKind::ARMV9_3A:
case ArchKind::ARMV9_4A:
+ case ArchKind::ARMV9_5A:
return 9;
case ArchKind::INVALID:
return 0;
@@ -123,6 +124,7 @@ static ARM::ProfileKind getProfileKind(ARM::ArchKind AK) {
case ARM::ArchKind::ARMV9_2A:
case ARM::ArchKind::ARMV9_3A:
case ARM::ArchKind::ARMV9_4A:
+ case ARM::ArchKind::ARMV9_5A:
return ARM::ProfileKind::A;
case ARM::ArchKind::ARMV4:
case ARM::ArchKind::ARMV4T:
diff --git a/llvm/lib/TargetParser/Triple.cpp b/llvm/lib/TargetParser/Triple.cpp
index 3212ba77de9bdb..0bbe8a3cedfd78 100644
--- a/llvm/lib/TargetParser/Triple.cpp
+++ b/llvm/lib/TargetParser/Triple.cpp
@@ -811,6 +811,8 @@ static Triple::SubArchType parseSubArch(StringRef SubArchName) {
return Triple::ARMSubArch_v9_3a;
case ARM::ArchKind::ARMV9_4A:
return Triple::ARMSubArch_v9_4a;
+ case ARM::ArchKind::ARMV9_5A:
+ return Triple::ARMSubArch_v9_5a;
case ARM::ArchKind::ARMV8R:
return Triple::ARMSubArch_v8r;
case ARM::ArchKind::ARMV8MBaseline:
diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp b/llvm/unittests/TargetParser/TargetParserTest.cpp
index f41b856da7c189..d31fcd1bb1b00d 100644
--- a/llvm/unittests/TargetParser/TargetParserTest.cpp
+++ b/llvm/unittests/TargetParser/TargetParserTest.cpp
@@ -45,7 +45,7 @@ const char *ARMArch[] = {
"armv8m.main", "iwmmxt", "iwmmxt2", "xscale", "armv8.1-m.main",
"armv9-a", "armv9", "armv9a", "armv9.1-a", "armv9.1a",
"armv9.2-a", "armv9.2a", "armv9.3-a", "armv9.3a", "armv9.4-a",
- "armv9.4a",
+ "armv9.4a", "armv9.5-a", "armv9.5a",
};
std::string FormatExtensionFlags(int64_t Flags) {
@@ -605,6 +605,9 @@ TEST(TargetParserTest, testARMArch) {
EXPECT_TRUE(
testARMArch("armv9.4-a", "generic", "v9.4a",
ARMBuildAttrs::CPUArch::v9_A));
+ EXPECT_TRUE(
+ testARMArch("armv9.5-a", "generic", "v9.5a",
+ ARMBuildAttrs::CPUArch::v9_A));
EXPECT_TRUE(
testARMArch("armv8-r", "cortex-r52", "v8r",
ARMBuildAttrs::CPUArch::v8_R));
@@ -940,6 +943,7 @@ TEST(TargetParserTest, ARMparseArchProfile) {
case ARM::ArchKind::ARMV9_2A:
case ARM::ArchKind::ARMV9_3A:
case ARM::ArchKind::ARMV9_4A:
+ case ARM::ArchKind::ARMV9_5A:
EXPECT_EQ(ARM::ProfileKind::A, ARM::parseArchProfile(ARMArch[i]));
break;
default:
|
|
@llvm/pr-subscribers-backend-arm Author: Lucas Duarte Prates (pratlucas) ChangesThis introduces the Armv9.5-A architecture version to the Arm backend, Mode details about the Armv9.5-A architecture version can be found at:
Full diff: https://github.com/llvm/llvm-project/pull/78994.diff 11 Files Affected:
diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp
index a72bd42bad41579..55b71557452fa04 100644
--- a/clang/lib/Basic/Targets/ARM.cpp
+++ b/clang/lib/Basic/Targets/ARM.cpp
@@ -227,6 +227,8 @@ StringRef ARMTargetInfo::getCPUAttr() const {
return "9_3A";
case llvm::ARM::ArchKind::ARMV9_4A:
return "9_4A";
+ case llvm::ARM::ArchKind::ARMV9_5A:
+ return "9_5A";
case llvm::ARM::ArchKind::ARMV8MBaseline:
return "8M_BASE";
case llvm::ARM::ArchKind::ARMV8MMainline:
@@ -889,6 +891,7 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts,
case llvm::ARM::ArchKind::ARMV9_2A:
case llvm::ARM::ArchKind::ARMV9_3A:
case llvm::ARM::ArchKind::ARMV9_4A:
+ case llvm::ARM::ArchKind::ARMV9_5A:
// Filter __arm_cdp, __arm_ldcl, __arm_stcl in arm_acle.h
FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B3;
break;
@@ -1057,6 +1060,7 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts,
case llvm::ARM::ArchKind::ARMV9_2A:
case llvm::ARM::ArchKind::ARMV9_3A:
case llvm::ARM::ArchKind::ARMV9_4A:
+ case llvm::ARM::ArchKind::ARMV9_5A:
getTargetDefinesARMV83A(Opts, Builder);
break;
}
diff --git a/clang/test/CodeGen/arm-acle-coproc.c b/clang/test/CodeGen/arm-acle-coproc.c
index cf87130932edfe9..0354d1297ece182 100644
--- a/clang/test/CodeGen/arm-acle-coproc.c
+++ b/clang/test/CodeGen/arm-acle-coproc.c
@@ -24,6 +24,7 @@
// RUN: %clang_cc1 -triple armv9.2a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple armv9.3a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple armv9.4a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple armv9.5a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple thumbv4 %s -E -dD -o - | FileCheck --check-prefix=CHECK-V4-THUMB %s
// RUN: %clang_cc1 -triple thumbv4t %s -E -dD -o - | FileCheck --check-prefix=CHECK-V4-THUMB %s
// RUN: %clang_cc1 -triple thumbv5 %s -E -dD -o - | FileCheck --check-prefix=CHECK-V5-THUMB %s
@@ -52,6 +53,7 @@
// RUN: %clang_cc1 -triple thumbv9.2a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple thumbv9.3a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple thumbv9.4a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple thumbv9.5a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple thumbv8m.base %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8-BASE %s
// RUN: %clang_cc1 -triple thumbv8m.main %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8-MAIN %s
// RUN: %clang_cc1 -triple thumbv8.1m.main %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8-MAIN %s
diff --git a/clang/test/Driver/arm-cortex-cpus-1.c b/clang/test/Driver/arm-cortex-cpus-1.c
index 2f300efee75ed4c..25abbe1e3a8ad7a 100644
--- a/clang/test/Driver/arm-cortex-cpus-1.c
+++ b/clang/test/Driver/arm-cortex-cpus-1.c
@@ -478,3 +478,20 @@
// RUN: %clang -target arm -march=armebv9.4a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V94A %s
// RUN: %clang -target arm -march=armebv9.4-a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V94A %s
// CHECK-BE-V94A: "-cc1"{{.*}} "-triple" "armebv9.4{{.*}}" "-target-cpu" "generic"
+
+// RUN: %clang -target armv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
+// RUN: %clang -target arm -march=armv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
+// RUN: %clang -target arm -march=armv9.5-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
+// RUN: %clang -target arm -march=armv9.5a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
+// RUN: %clang -target armv9.5a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
+// RUN: %clang -target arm -march=armv9.5a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
+// RUN: %clang -target arm -mlittle-endian -march=armv9.5-a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
+// CHECK-V95A: "-cc1"{{.*}} "-triple" "armv9.5{{.*}}" "-target-cpu" "generic"
+
+// RUN: %clang -target armebv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
+// RUN: %clang -target armv9.5a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
+// RUN: %clang -target armeb -march=armebv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
+// RUN: %clang -target armeb -march=armebv9.5-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
+// RUN: %clang -target arm -march=armebv9.5a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
+// RUN: %clang -target arm -march=armebv9.5-a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
+// CHECK-BE-V95A: "-cc1"{{.*}} "-triple" "armebv9.5{{.*}}" "-target-cpu" "generic"
diff --git a/clang/test/Preprocessor/arm-target-features.c b/clang/test/Preprocessor/arm-target-features.c
index 1539d03a044fa14..236c9f2479b7058 100644
--- a/clang/test/Preprocessor/arm-target-features.c
+++ b/clang/test/Preprocessor/arm-target-features.c
@@ -897,6 +897,11 @@
// CHECK-V94A: #define __ARM_ARCH_9_4A__ 1
// CHECK-V94A: #define __ARM_ARCH_PROFILE 'A'
+// RUN: %clang -target armv9.5a-none-none-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V95A %s
+// CHECK-V95A: #define __ARM_ARCH 9
+// CHECK-V95A: #define __ARM_ARCH_9_5A__ 1
+// CHECK-V95A: #define __ARM_ARCH_PROFILE 'A'
+
// RUN: %clang -target arm-none-none-eabi -march=armv7-m -mfpu=softvfp -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SOFTVFP %s
// CHECK-SOFTVFP-NOT: #define __ARM_FP 0x
diff --git a/llvm/include/llvm/TargetParser/ARMTargetParser.def b/llvm/include/llvm/TargetParser/ARMTargetParser.def
index c520ab898cb90a3..1797a1b238d349a 100644
--- a/llvm/include/llvm/TargetParser/ARMTargetParser.def
+++ b/llvm/include/llvm/TargetParser/ARMTargetParser.def
@@ -151,6 +151,11 @@ ARM_ARCH("armv9.4-a", ARMV9_4A, "9.4-A", "+v9.4a",
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM))
+ARM_ARCH("armv9.5-a", ARMV9_5A, "9.5-A", "+v9.5a",
+ ARMBuildAttrs::CPUArch::v9_A, FK_NEON_FP_ARMV8,
+ (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
+ ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
+ ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM))
ARM_ARCH("armv8-r", ARMV8R, "8-R", "+v8r", ARMBuildAttrs::CPUArch::v8_R,
FK_NEON_FP_ARMV8,
(ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB |
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td
index 97d1444a553eb18..d68a6847b382027 100644
--- a/llvm/lib/Target/ARM/ARM.td
+++ b/llvm/lib/Target/ARM/ARM.td
@@ -704,6 +704,10 @@ def HasV9_4aOps : SubtargetFeature<"v9.4a", "HasV9_4aOps", "true",
"Support ARM v9.4a instructions",
[HasV8_9aOps, HasV9_3aOps]>;
+def HasV9_5aOps : SubtargetFeature<"v9.5a", "HasV9_5aOps", "true",
+ "Support ARM v9.5a instructions",
+ [HasV9_4aOps]>;
+
def HasV8_1MMainlineOps : SubtargetFeature<
"v8.1m.main", "HasV8_1MMainlineOps", "true",
"Support ARM v8-1M Mainline instructions",
@@ -1139,6 +1143,18 @@ def ARMv94a : Architecture<"armv9.4-a", "ARMv94a", [HasV9_4aOps,
FeatureCRC,
FeatureRAS,
FeatureDotProd]>;
+def ARMv95a : Architecture<"armv9.5-a", "ARMv95a", [HasV9_5aOps,
+ FeatureAClass,
+ FeatureDB,
+ FeatureFPARMv8,
+ FeatureNEON,
+ FeatureDSP,
+ FeatureTrustZone,
+ FeatureMP,
+ FeatureVirtualization,
+ FeatureCRC,
+ FeatureRAS,
+ FeatureDotProd]>;
def ARMv8r : Architecture<"armv8-r", "ARMv8r", [HasV8Ops,
FeatureRClass,
diff --git a/llvm/lib/Target/ARM/ARMSubtarget.h b/llvm/lib/Target/ARM/ARMSubtarget.h
index 43b4123a1b55713..91f3978b041a3a7 100644
--- a/llvm/lib/Target/ARM/ARMSubtarget.h
+++ b/llvm/lib/Target/ARM/ARMSubtarget.h
@@ -132,6 +132,7 @@ class ARMSubtarget : public ARMGenSubtargetInfo {
ARMv92a,
ARMv93a,
ARMv94a,
+ ARMv95a,
};
public:
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
index 9c9af6068079d3d..1d80af590d16e00 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
@@ -898,6 +898,7 @@ void ARMTargetELFStreamer::emitArchDefaultAttributes() {
case ARM::ArchKind::ARMV9_2A:
case ARM::ArchKind::ARMV9_3A:
case ARM::ArchKind::ARMV9_4A:
+ case ARM::ArchKind::ARMV9_5A:
S.setAttributeItem(CPU_arch_profile, ApplicationProfile, false);
S.setAttributeItem(ARM_ISA_use, Allowed, false);
S.setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
diff --git a/llvm/lib/TargetParser/ARMTargetParser.cpp b/llvm/lib/TargetParser/ARMTargetParser.cpp
index c470a1321fcbdc8..67f937ebc33f9fd 100644
--- a/llvm/lib/TargetParser/ARMTargetParser.cpp
+++ b/llvm/lib/TargetParser/ARMTargetParser.cpp
@@ -86,6 +86,7 @@ unsigned ARM::parseArchVersion(StringRef Arch) {
case ArchKind::ARMV9_2A:
case ArchKind::ARMV9_3A:
case ArchKind::ARMV9_4A:
+ case ArchKind::ARMV9_5A:
return 9;
case ArchKind::INVALID:
return 0;
@@ -123,6 +124,7 @@ static ARM::ProfileKind getProfileKind(ARM::ArchKind AK) {
case ARM::ArchKind::ARMV9_2A:
case ARM::ArchKind::ARMV9_3A:
case ARM::ArchKind::ARMV9_4A:
+ case ARM::ArchKind::ARMV9_5A:
return ARM::ProfileKind::A;
case ARM::ArchKind::ARMV4:
case ARM::ArchKind::ARMV4T:
diff --git a/llvm/lib/TargetParser/Triple.cpp b/llvm/lib/TargetParser/Triple.cpp
index 3212ba77de9bdba..0bbe8a3cedfd782 100644
--- a/llvm/lib/TargetParser/Triple.cpp
+++ b/llvm/lib/TargetParser/Triple.cpp
@@ -811,6 +811,8 @@ static Triple::SubArchType parseSubArch(StringRef SubArchName) {
return Triple::ARMSubArch_v9_3a;
case ARM::ArchKind::ARMV9_4A:
return Triple::ARMSubArch_v9_4a;
+ case ARM::ArchKind::ARMV9_5A:
+ return Triple::ARMSubArch_v9_5a;
case ARM::ArchKind::ARMV8R:
return Triple::ARMSubArch_v8r;
case ARM::ArchKind::ARMV8MBaseline:
diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp b/llvm/unittests/TargetParser/TargetParserTest.cpp
index f41b856da7c1897..d31fcd1bb1b00d0 100644
--- a/llvm/unittests/TargetParser/TargetParserTest.cpp
+++ b/llvm/unittests/TargetParser/TargetParserTest.cpp
@@ -45,7 +45,7 @@ const char *ARMArch[] = {
"armv8m.main", "iwmmxt", "iwmmxt2", "xscale", "armv8.1-m.main",
"armv9-a", "armv9", "armv9a", "armv9.1-a", "armv9.1a",
"armv9.2-a", "armv9.2a", "armv9.3-a", "armv9.3a", "armv9.4-a",
- "armv9.4a",
+ "armv9.4a", "armv9.5-a", "armv9.5a",
};
std::string FormatExtensionFlags(int64_t Flags) {
@@ -605,6 +605,9 @@ TEST(TargetParserTest, testARMArch) {
EXPECT_TRUE(
testARMArch("armv9.4-a", "generic", "v9.4a",
ARMBuildAttrs::CPUArch::v9_A));
+ EXPECT_TRUE(
+ testARMArch("armv9.5-a", "generic", "v9.5a",
+ ARMBuildAttrs::CPUArch::v9_A));
EXPECT_TRUE(
testARMArch("armv8-r", "cortex-r52", "v8r",
ARMBuildAttrs::CPUArch::v8_R));
@@ -940,6 +943,7 @@ TEST(TargetParserTest, ARMparseArchProfile) {
case ARM::ArchKind::ARMV9_2A:
case ARM::ArchKind::ARMV9_3A:
case ARM::ArchKind::ARMV9_4A:
+ case ARM::ArchKind::ARMV9_5A:
EXPECT_EQ(ARM::ProfileKind::A, ARM::parseArchProfile(ARMArch[i]));
break;
default:
|
|
@llvm/pr-subscribers-clang Author: Lucas Duarte Prates (pratlucas) ChangesThis introduces the Armv9.5-A architecture version to the Arm backend, Mode details about the Armv9.5-A architecture version can be found at:
Full diff: https://github.com/llvm/llvm-project/pull/78994.diff 11 Files Affected:
diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp
index a72bd42bad4157..55b71557452fa0 100644
--- a/clang/lib/Basic/Targets/ARM.cpp
+++ b/clang/lib/Basic/Targets/ARM.cpp
@@ -227,6 +227,8 @@ StringRef ARMTargetInfo::getCPUAttr() const {
return "9_3A";
case llvm::ARM::ArchKind::ARMV9_4A:
return "9_4A";
+ case llvm::ARM::ArchKind::ARMV9_5A:
+ return "9_5A";
case llvm::ARM::ArchKind::ARMV8MBaseline:
return "8M_BASE";
case llvm::ARM::ArchKind::ARMV8MMainline:
@@ -889,6 +891,7 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts,
case llvm::ARM::ArchKind::ARMV9_2A:
case llvm::ARM::ArchKind::ARMV9_3A:
case llvm::ARM::ArchKind::ARMV9_4A:
+ case llvm::ARM::ArchKind::ARMV9_5A:
// Filter __arm_cdp, __arm_ldcl, __arm_stcl in arm_acle.h
FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B3;
break;
@@ -1057,6 +1060,7 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts,
case llvm::ARM::ArchKind::ARMV9_2A:
case llvm::ARM::ArchKind::ARMV9_3A:
case llvm::ARM::ArchKind::ARMV9_4A:
+ case llvm::ARM::ArchKind::ARMV9_5A:
getTargetDefinesARMV83A(Opts, Builder);
break;
}
diff --git a/clang/test/CodeGen/arm-acle-coproc.c b/clang/test/CodeGen/arm-acle-coproc.c
index cf87130932edfe..0354d1297ece18 100644
--- a/clang/test/CodeGen/arm-acle-coproc.c
+++ b/clang/test/CodeGen/arm-acle-coproc.c
@@ -24,6 +24,7 @@
// RUN: %clang_cc1 -triple armv9.2a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple armv9.3a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple armv9.4a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple armv9.5a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple thumbv4 %s -E -dD -o - | FileCheck --check-prefix=CHECK-V4-THUMB %s
// RUN: %clang_cc1 -triple thumbv4t %s -E -dD -o - | FileCheck --check-prefix=CHECK-V4-THUMB %s
// RUN: %clang_cc1 -triple thumbv5 %s -E -dD -o - | FileCheck --check-prefix=CHECK-V5-THUMB %s
@@ -52,6 +53,7 @@
// RUN: %clang_cc1 -triple thumbv9.2a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple thumbv9.3a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple thumbv9.4a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple thumbv9.5a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple thumbv8m.base %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8-BASE %s
// RUN: %clang_cc1 -triple thumbv8m.main %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8-MAIN %s
// RUN: %clang_cc1 -triple thumbv8.1m.main %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8-MAIN %s
diff --git a/clang/test/Driver/arm-cortex-cpus-1.c b/clang/test/Driver/arm-cortex-cpus-1.c
index 2f300efee75ed4..25abbe1e3a8ad7 100644
--- a/clang/test/Driver/arm-cortex-cpus-1.c
+++ b/clang/test/Driver/arm-cortex-cpus-1.c
@@ -478,3 +478,20 @@
// RUN: %clang -target arm -march=armebv9.4a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V94A %s
// RUN: %clang -target arm -march=armebv9.4-a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V94A %s
// CHECK-BE-V94A: "-cc1"{{.*}} "-triple" "armebv9.4{{.*}}" "-target-cpu" "generic"
+
+// RUN: %clang -target armv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
+// RUN: %clang -target arm -march=armv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
+// RUN: %clang -target arm -march=armv9.5-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
+// RUN: %clang -target arm -march=armv9.5a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
+// RUN: %clang -target armv9.5a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
+// RUN: %clang -target arm -march=armv9.5a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
+// RUN: %clang -target arm -mlittle-endian -march=armv9.5-a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
+// CHECK-V95A: "-cc1"{{.*}} "-triple" "armv9.5{{.*}}" "-target-cpu" "generic"
+
+// RUN: %clang -target armebv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
+// RUN: %clang -target armv9.5a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
+// RUN: %clang -target armeb -march=armebv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
+// RUN: %clang -target armeb -march=armebv9.5-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
+// RUN: %clang -target arm -march=armebv9.5a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
+// RUN: %clang -target arm -march=armebv9.5-a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
+// CHECK-BE-V95A: "-cc1"{{.*}} "-triple" "armebv9.5{{.*}}" "-target-cpu" "generic"
diff --git a/clang/test/Preprocessor/arm-target-features.c b/clang/test/Preprocessor/arm-target-features.c
index 1539d03a044fa1..236c9f2479b705 100644
--- a/clang/test/Preprocessor/arm-target-features.c
+++ b/clang/test/Preprocessor/arm-target-features.c
@@ -897,6 +897,11 @@
// CHECK-V94A: #define __ARM_ARCH_9_4A__ 1
// CHECK-V94A: #define __ARM_ARCH_PROFILE 'A'
+// RUN: %clang -target armv9.5a-none-none-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V95A %s
+// CHECK-V95A: #define __ARM_ARCH 9
+// CHECK-V95A: #define __ARM_ARCH_9_5A__ 1
+// CHECK-V95A: #define __ARM_ARCH_PROFILE 'A'
+
// RUN: %clang -target arm-none-none-eabi -march=armv7-m -mfpu=softvfp -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SOFTVFP %s
// CHECK-SOFTVFP-NOT: #define __ARM_FP 0x
diff --git a/llvm/include/llvm/TargetParser/ARMTargetParser.def b/llvm/include/llvm/TargetParser/ARMTargetParser.def
index c520ab898cb90a..1797a1b238d349 100644
--- a/llvm/include/llvm/TargetParser/ARMTargetParser.def
+++ b/llvm/include/llvm/TargetParser/ARMTargetParser.def
@@ -151,6 +151,11 @@ ARM_ARCH("armv9.4-a", ARMV9_4A, "9.4-A", "+v9.4a",
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM))
+ARM_ARCH("armv9.5-a", ARMV9_5A, "9.5-A", "+v9.5a",
+ ARMBuildAttrs::CPUArch::v9_A, FK_NEON_FP_ARMV8,
+ (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
+ ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
+ ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM))
ARM_ARCH("armv8-r", ARMV8R, "8-R", "+v8r", ARMBuildAttrs::CPUArch::v8_R,
FK_NEON_FP_ARMV8,
(ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB |
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td
index 97d1444a553eb1..d68a6847b38202 100644
--- a/llvm/lib/Target/ARM/ARM.td
+++ b/llvm/lib/Target/ARM/ARM.td
@@ -704,6 +704,10 @@ def HasV9_4aOps : SubtargetFeature<"v9.4a", "HasV9_4aOps", "true",
"Support ARM v9.4a instructions",
[HasV8_9aOps, HasV9_3aOps]>;
+def HasV9_5aOps : SubtargetFeature<"v9.5a", "HasV9_5aOps", "true",
+ "Support ARM v9.5a instructions",
+ [HasV9_4aOps]>;
+
def HasV8_1MMainlineOps : SubtargetFeature<
"v8.1m.main", "HasV8_1MMainlineOps", "true",
"Support ARM v8-1M Mainline instructions",
@@ -1139,6 +1143,18 @@ def ARMv94a : Architecture<"armv9.4-a", "ARMv94a", [HasV9_4aOps,
FeatureCRC,
FeatureRAS,
FeatureDotProd]>;
+def ARMv95a : Architecture<"armv9.5-a", "ARMv95a", [HasV9_5aOps,
+ FeatureAClass,
+ FeatureDB,
+ FeatureFPARMv8,
+ FeatureNEON,
+ FeatureDSP,
+ FeatureTrustZone,
+ FeatureMP,
+ FeatureVirtualization,
+ FeatureCRC,
+ FeatureRAS,
+ FeatureDotProd]>;
def ARMv8r : Architecture<"armv8-r", "ARMv8r", [HasV8Ops,
FeatureRClass,
diff --git a/llvm/lib/Target/ARM/ARMSubtarget.h b/llvm/lib/Target/ARM/ARMSubtarget.h
index 43b4123a1b5571..91f3978b041a3a 100644
--- a/llvm/lib/Target/ARM/ARMSubtarget.h
+++ b/llvm/lib/Target/ARM/ARMSubtarget.h
@@ -132,6 +132,7 @@ class ARMSubtarget : public ARMGenSubtargetInfo {
ARMv92a,
ARMv93a,
ARMv94a,
+ ARMv95a,
};
public:
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
index 9c9af6068079d3..1d80af590d16e0 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
@@ -898,6 +898,7 @@ void ARMTargetELFStreamer::emitArchDefaultAttributes() {
case ARM::ArchKind::ARMV9_2A:
case ARM::ArchKind::ARMV9_3A:
case ARM::ArchKind::ARMV9_4A:
+ case ARM::ArchKind::ARMV9_5A:
S.setAttributeItem(CPU_arch_profile, ApplicationProfile, false);
S.setAttributeItem(ARM_ISA_use, Allowed, false);
S.setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
diff --git a/llvm/lib/TargetParser/ARMTargetParser.cpp b/llvm/lib/TargetParser/ARMTargetParser.cpp
index c470a1321fcbdc..67f937ebc33f9f 100644
--- a/llvm/lib/TargetParser/ARMTargetParser.cpp
+++ b/llvm/lib/TargetParser/ARMTargetParser.cpp
@@ -86,6 +86,7 @@ unsigned ARM::parseArchVersion(StringRef Arch) {
case ArchKind::ARMV9_2A:
case ArchKind::ARMV9_3A:
case ArchKind::ARMV9_4A:
+ case ArchKind::ARMV9_5A:
return 9;
case ArchKind::INVALID:
return 0;
@@ -123,6 +124,7 @@ static ARM::ProfileKind getProfileKind(ARM::ArchKind AK) {
case ARM::ArchKind::ARMV9_2A:
case ARM::ArchKind::ARMV9_3A:
case ARM::ArchKind::ARMV9_4A:
+ case ARM::ArchKind::ARMV9_5A:
return ARM::ProfileKind::A;
case ARM::ArchKind::ARMV4:
case ARM::ArchKind::ARMV4T:
diff --git a/llvm/lib/TargetParser/Triple.cpp b/llvm/lib/TargetParser/Triple.cpp
index 3212ba77de9bdb..0bbe8a3cedfd78 100644
--- a/llvm/lib/TargetParser/Triple.cpp
+++ b/llvm/lib/TargetParser/Triple.cpp
@@ -811,6 +811,8 @@ static Triple::SubArchType parseSubArch(StringRef SubArchName) {
return Triple::ARMSubArch_v9_3a;
case ARM::ArchKind::ARMV9_4A:
return Triple::ARMSubArch_v9_4a;
+ case ARM::ArchKind::ARMV9_5A:
+ return Triple::ARMSubArch_v9_5a;
case ARM::ArchKind::ARMV8R:
return Triple::ARMSubArch_v8r;
case ARM::ArchKind::ARMV8MBaseline:
diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp b/llvm/unittests/TargetParser/TargetParserTest.cpp
index f41b856da7c189..d31fcd1bb1b00d 100644
--- a/llvm/unittests/TargetParser/TargetParserTest.cpp
+++ b/llvm/unittests/TargetParser/TargetParserTest.cpp
@@ -45,7 +45,7 @@ const char *ARMArch[] = {
"armv8m.main", "iwmmxt", "iwmmxt2", "xscale", "armv8.1-m.main",
"armv9-a", "armv9", "armv9a", "armv9.1-a", "armv9.1a",
"armv9.2-a", "armv9.2a", "armv9.3-a", "armv9.3a", "armv9.4-a",
- "armv9.4a",
+ "armv9.4a", "armv9.5-a", "armv9.5a",
};
std::string FormatExtensionFlags(int64_t Flags) {
@@ -605,6 +605,9 @@ TEST(TargetParserTest, testARMArch) {
EXPECT_TRUE(
testARMArch("armv9.4-a", "generic", "v9.4a",
ARMBuildAttrs::CPUArch::v9_A));
+ EXPECT_TRUE(
+ testARMArch("armv9.5-a", "generic", "v9.5a",
+ ARMBuildAttrs::CPUArch::v9_A));
EXPECT_TRUE(
testARMArch("armv8-r", "cortex-r52", "v8r",
ARMBuildAttrs::CPUArch::v8_R));
@@ -940,6 +943,7 @@ TEST(TargetParserTest, ARMparseArchProfile) {
case ARM::ArchKind::ARMV9_2A:
case ARM::ArchKind::ARMV9_3A:
case ARM::ArchKind::ARMV9_4A:
+ case ARM::ArchKind::ARMV9_5A:
EXPECT_EQ(ARM::ProfileKind::A, ARM::parseArchProfile(ARMArch[i]));
break;
default:
|
You can test this locally with the following command:git-clang-format --diff fa6025e25b5754e8cf39169e3a7085b57ea35de5 1345e4862b7a9e3858a05a3ae00d8f3fd41b5066 -- clang/lib/Basic/Targets/ARM.cpp clang/test/CodeGen/arm-acle-coproc.c clang/test/Driver/arm-cortex-cpus-1.c clang/test/Preprocessor/arm-target-features.c llvm/lib/Target/ARM/ARMSubtarget.h llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp llvm/lib/TargetParser/ARMTargetParser.cpp llvm/lib/TargetParser/Triple.cpp llvm/unittests/TargetParser/TargetParserTest.cppView the diff from clang-format here.diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp b/llvm/unittests/TargetParser/TargetParserTest.cpp
index d31fcd1bb1..717fef5a73 100644
--- a/llvm/unittests/TargetParser/TargetParserTest.cpp
+++ b/llvm/unittests/TargetParser/TargetParserTest.cpp
@@ -30,22 +30,22 @@ using ::testing::StrEq;
namespace {
const char *ARMArch[] = {
- "armv4", "armv4t", "armv5", "armv5t", "armv5e",
- "armv5te", "armv5tej", "armv6", "armv6j", "armv6k",
- "armv6hl", "armv6t2", "armv6kz", "armv6z", "armv6zk",
- "armv6-m", "armv6m", "armv6sm", "armv6s-m", "armv7-a",
- "armv7", "armv7a", "armv7ve", "armv7hl", "armv7l",
- "armv7-r", "armv7r", "armv7-m", "armv7m", "armv7k",
- "armv7s", "armv7e-m", "armv7em", "armv8-a", "armv8",
- "armv8a", "armv8l", "armv8.1-a", "armv8.1a", "armv8.2-a",
- "armv8.2a", "armv8.3-a", "armv8.3a", "armv8.4-a", "armv8.4a",
- "armv8.5-a", "armv8.5a", "armv8.6-a", "armv8.6a", "armv8.7-a",
- "armv8.7a", "armv8.8-a", "armv8.8a", "armv8.9-a", "armv8.9a",
- "armv8-r", "armv8r", "armv8-m.base", "armv8m.base", "armv8-m.main",
- "armv8m.main", "iwmmxt", "iwmmxt2", "xscale", "armv8.1-m.main",
- "armv9-a", "armv9", "armv9a", "armv9.1-a", "armv9.1a",
- "armv9.2-a", "armv9.2a", "armv9.3-a", "armv9.3a", "armv9.4-a",
- "armv9.4a", "armv9.5-a", "armv9.5a",
+ "armv4", "armv4t", "armv5", "armv5t", "armv5e",
+ "armv5te", "armv5tej", "armv6", "armv6j", "armv6k",
+ "armv6hl", "armv6t2", "armv6kz", "armv6z", "armv6zk",
+ "armv6-m", "armv6m", "armv6sm", "armv6s-m", "armv7-a",
+ "armv7", "armv7a", "armv7ve", "armv7hl", "armv7l",
+ "armv7-r", "armv7r", "armv7-m", "armv7m", "armv7k",
+ "armv7s", "armv7e-m", "armv7em", "armv8-a", "armv8",
+ "armv8a", "armv8l", "armv8.1-a", "armv8.1a", "armv8.2-a",
+ "armv8.2a", "armv8.3-a", "armv8.3a", "armv8.4-a", "armv8.4a",
+ "armv8.5-a", "armv8.5a", "armv8.6-a", "armv8.6a", "armv8.7-a",
+ "armv8.7a", "armv8.8-a", "armv8.8a", "armv8.9-a", "armv8.9a",
+ "armv8-r", "armv8r", "armv8-m.base", "armv8m.base", "armv8-m.main",
+ "armv8m.main", "iwmmxt", "iwmmxt2", "xscale", "armv8.1-m.main",
+ "armv9-a", "armv9", "armv9a", "armv9.1-a", "armv9.1a",
+ "armv9.2-a", "armv9.2a", "armv9.3-a", "armv9.3a", "armv9.4-a",
+ "armv9.4a", "armv9.5-a", "armv9.5a",
};
std::string FormatExtensionFlags(int64_t Flags) {
@@ -605,8 +605,7 @@ TEST(TargetParserTest, testARMArch) {
EXPECT_TRUE(
testARMArch("armv9.4-a", "generic", "v9.4a",
ARMBuildAttrs::CPUArch::v9_A));
- EXPECT_TRUE(
- testARMArch("armv9.5-a", "generic", "v9.5a",
+ EXPECT_TRUE(testARMArch("armv9.5-a", "generic", "v9.5a",
ARMBuildAttrs::CPUArch::v9_A));
EXPECT_TRUE(
testARMArch("armv8-r", "cortex-r52", "v8r",
|
pratlucas
requested review from
jthackray,
vhscampos,
rgwott and
tmatheson-arm
|
Does this have an 8.x version to go with it like the previous ones? |
|
No, V9.5-A is v9-only. The v9.4-A version was the last one to have a matching v8.x. |
jthackray
approved these changes
Jan 22, 2024
Cool. If you can find where we encode that mapping, it's worth adding a comment to say explicitly that the relation stops at 9.5. |
|
It's already there for AArch64, . Maybe ARM does it differently. |
|
The ARM Target Parser is behind the AArch64 one in terms of design and refactoring. For the ARM case that relationship is not explicitly encoded in a single place, there are multiple switch-cases covering specific scenarios instead (e.g. the ones updated by this patch in clang/lib/Basic/Targets/ARM.cpp). I've added a comment only to the TableGen file for now, at least until we get the ARM target parser to the same standards as the AArch64 one. |
DavidSpickett
approved these changes
Jan 23, 2024
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This introduces the Armv9.5-A architecture version to the Arm backend,
following on from the existing implementation for AArch64 targets.
Mode details about the Armv9.5-A architecture version can be found at: