Skip to content

[ARM] Introduce the v9.5-A architecture version to Arm targets #78994

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 2 commits into from
Jan 23, 2024
Merged

[ARM] Introduce the v9.5-A architecture version to Arm targets #78994

Show file tree
Hide file tree
Changes from 1 commit
Commits
Show all changes
2 commits
Select commit Hold shift + click to select a range
b3f8e9d
[ARM] Introduce the v9.5-A architecture version to Arm targets
pratlucas Jan 22, 2024
1345e48
fixup! [ARM] Introduce the v9.5-A architecture version to Arm targets
pratlucas Jan 23, 2024
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
4 changes: 4 additions & 0 deletions clang/lib/Basic/Targets/ARM.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -227,6 +227,8 @@ StringRef ARMTargetInfo::getCPUAttr() const {
return "9_3A";
case llvm::ARM::ArchKind::ARMV9_4A:
return "9_4A";
case llvm::ARM::ArchKind::ARMV9_5A:
return "9_5A";
case llvm::ARM::ArchKind::ARMV8MBaseline:
return "8M_BASE";
case llvm::ARM::ArchKind::ARMV8MMainline:
Expand Down Expand Up @@ -889,6 +891,7 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts,
case llvm::ARM::ArchKind::ARMV9_2A:
case llvm::ARM::ArchKind::ARMV9_3A:
case llvm::ARM::ArchKind::ARMV9_4A:
case llvm::ARM::ArchKind::ARMV9_5A:
// Filter __arm_cdp, __arm_ldcl, __arm_stcl in arm_acle.h
FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B3;
break;
Expand Down Expand Up @@ -1057,6 +1060,7 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts,
case llvm::ARM::ArchKind::ARMV9_2A:
case llvm::ARM::ArchKind::ARMV9_3A:
case llvm::ARM::ArchKind::ARMV9_4A:
case llvm::ARM::ArchKind::ARMV9_5A:
getTargetDefinesARMV83A(Opts, Builder);
break;
}
Expand Down
2 changes: 2 additions & 0 deletions clang/test/CodeGen/arm-acle-coproc.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -24,6 +24,7 @@
// RUN: %clang_cc1 -triple armv9.2a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple armv9.3a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple armv9.4a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple armv9.5a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple thumbv4 %s -E -dD -o - | FileCheck --check-prefix=CHECK-V4-THUMB %s
// RUN: %clang_cc1 -triple thumbv4t %s -E -dD -o - | FileCheck --check-prefix=CHECK-V4-THUMB %s
// RUN: %clang_cc1 -triple thumbv5 %s -E -dD -o - | FileCheck --check-prefix=CHECK-V5-THUMB %s
Expand Down Expand Up @@ -52,6 +53,7 @@
// RUN: %clang_cc1 -triple thumbv9.2a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple thumbv9.3a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple thumbv9.4a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple thumbv9.5a %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8 %s
// RUN: %clang_cc1 -triple thumbv8m.base %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8-BASE %s
// RUN: %clang_cc1 -triple thumbv8m.main %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8-MAIN %s
// RUN: %clang_cc1 -triple thumbv8.1m.main %s -E -dD -o - | FileCheck --check-prefix=CHECK-V8-MAIN %s
Expand Down
17 changes: 17 additions & 0 deletions clang/test/Driver/arm-cortex-cpus-1.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -478,3 +478,20 @@
// RUN: %clang -target arm -march=armebv9.4a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V94A %s
// RUN: %clang -target arm -march=armebv9.4-a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V94A %s
// CHECK-BE-V94A: "-cc1"{{.*}} "-triple" "armebv9.4{{.*}}" "-target-cpu" "generic"

// RUN: %clang -target armv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
// RUN: %clang -target arm -march=armv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
// RUN: %clang -target arm -march=armv9.5-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
// RUN: %clang -target arm -march=armv9.5a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
// RUN: %clang -target armv9.5a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
// RUN: %clang -target arm -march=armv9.5a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
// RUN: %clang -target arm -mlittle-endian -march=armv9.5-a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V95A %s
// CHECK-V95A: "-cc1"{{.*}} "-triple" "armv9.5{{.*}}" "-target-cpu" "generic"

// RUN: %clang -target armebv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
// RUN: %clang -target armv9.5a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
// RUN: %clang -target armeb -march=armebv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
// RUN: %clang -target armeb -march=armebv9.5-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
// RUN: %clang -target arm -march=armebv9.5a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
// RUN: %clang -target arm -march=armebv9.5-a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V95A %s
// CHECK-BE-V95A: "-cc1"{{.*}} "-triple" "armebv9.5{{.*}}" "-target-cpu" "generic"
5 changes: 5 additions & 0 deletions clang/test/Preprocessor/arm-target-features.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -897,6 +897,11 @@
// CHECK-V94A: #define __ARM_ARCH_9_4A__ 1
// CHECK-V94A: #define __ARM_ARCH_PROFILE 'A'

// RUN: %clang -target armv9.5a-none-none-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V95A %s
// CHECK-V95A: #define __ARM_ARCH 9
// CHECK-V95A: #define __ARM_ARCH_9_5A__ 1
// CHECK-V95A: #define __ARM_ARCH_PROFILE 'A'

// RUN: %clang -target arm-none-none-eabi -march=armv7-m -mfpu=softvfp -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SOFTVFP %s
// CHECK-SOFTVFP-NOT: #define __ARM_FP 0x

Expand Down
5 changes: 5 additions & 0 deletions llvm/include/llvm/TargetParser/ARMTargetParser.def
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -151,6 +151,11 @@ ARM_ARCH("armv9.4-a", ARMV9_4A, "9.4-A", "+v9.4a",
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM))
ARM_ARCH("armv9.5-a", ARMV9_5A, "9.5-A", "+v9.5a",
ARMBuildAttrs::CPUArch::v9_A, FK_NEON_FP_ARMV8,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM))
ARM_ARCH("armv8-r", ARMV8R, "8-R", "+v8r", ARMBuildAttrs::CPUArch::v8_R,
FK_NEON_FP_ARMV8,
(ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB |
Expand Down
16 changes: 16 additions & 0 deletions llvm/lib/Target/ARM/ARM.td
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -704,6 +704,10 @@ def HasV9_4aOps : SubtargetFeature<"v9.4a", "HasV9_4aOps", "true",
"Support ARM v9.4a instructions",
[HasV8_9aOps, HasV9_3aOps]>;

def HasV9_5aOps : SubtargetFeature<"v9.5a", "HasV9_5aOps", "true",
"Support ARM v9.5a instructions",
[HasV9_4aOps]>;

def HasV8_1MMainlineOps : SubtargetFeature<
"v8.1m.main", "HasV8_1MMainlineOps", "true",
"Support ARM v8-1M Mainline instructions",
Expand Down Expand Up @@ -1139,6 +1143,18 @@ def ARMv94a : Architecture<"armv9.4-a", "ARMv94a", [HasV9_4aOps,
FeatureCRC,
FeatureRAS,
FeatureDotProd]>;
def ARMv95a : Architecture<"armv9.5-a", "ARMv95a", [HasV9_5aOps,
FeatureAClass,
FeatureDB,
FeatureFPARMv8,
FeatureNEON,
FeatureDSP,
FeatureTrustZone,
FeatureMP,
FeatureVirtualization,
FeatureCRC,
FeatureRAS,
FeatureDotProd]>;

def ARMv8r : Architecture<"armv8-r", "ARMv8r", [HasV8Ops,
FeatureRClass,
Expand Down
1 change: 1 addition & 0 deletions llvm/lib/Target/ARM/ARMSubtarget.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -132,6 +132,7 @@ class ARMSubtarget : public ARMGenSubtargetInfo {
ARMv92a,
ARMv93a,
ARMv94a,
ARMv95a,
};

public:
Expand Down
1 change: 1 addition & 0 deletions llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -898,6 +898,7 @@ void ARMTargetELFStreamer::emitArchDefaultAttributes() {
case ARM::ArchKind::ARMV9_2A:
case ARM::ArchKind::ARMV9_3A:
case ARM::ArchKind::ARMV9_4A:
case ARM::ArchKind::ARMV9_5A:
S.setAttributeItem(CPU_arch_profile, ApplicationProfile, false);
S.setAttributeItem(ARM_ISA_use, Allowed, false);
S.setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
Expand Down
2 changes: 2 additions & 0 deletions llvm/lib/TargetParser/ARMTargetParser.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -86,6 +86,7 @@ unsigned ARM::parseArchVersion(StringRef Arch) {
case ArchKind::ARMV9_2A:
case ArchKind::ARMV9_3A:
case ArchKind::ARMV9_4A:
case ArchKind::ARMV9_5A:
return 9;
case ArchKind::INVALID:
return 0;
Expand Down Expand Up @@ -123,6 +124,7 @@ static ARM::ProfileKind getProfileKind(ARM::ArchKind AK) {
case ARM::ArchKind::ARMV9_2A:
case ARM::ArchKind::ARMV9_3A:
case ARM::ArchKind::ARMV9_4A:
case ARM::ArchKind::ARMV9_5A:
return ARM::ProfileKind::A;
case ARM::ArchKind::ARMV4:
case ARM::ArchKind::ARMV4T:
Expand Down
2 changes: 2 additions & 0 deletions llvm/lib/TargetParser/Triple.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -811,6 +811,8 @@ static Triple::SubArchType parseSubArch(StringRef SubArchName) {
return Triple::ARMSubArch_v9_3a;
case ARM::ArchKind::ARMV9_4A:
return Triple::ARMSubArch_v9_4a;
case ARM::ArchKind::ARMV9_5A:
return Triple::ARMSubArch_v9_5a;
case ARM::ArchKind::ARMV8R:
return Triple::ARMSubArch_v8r;
case ARM::ArchKind::ARMV8MBaseline:
Expand Down
6 changes: 5 additions & 1 deletion llvm/unittests/TargetParser/TargetParserTest.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -45,7 +45,7 @@ const char *ARMArch[] = {
"armv8m.main", "iwmmxt", "iwmmxt2", "xscale", "armv8.1-m.main",
"armv9-a", "armv9", "armv9a", "armv9.1-a", "armv9.1a",
"armv9.2-a", "armv9.2a", "armv9.3-a", "armv9.3a", "armv9.4-a",
"armv9.4a",
"armv9.4a", "armv9.5-a", "armv9.5a",
};

std::string FormatExtensionFlags(int64_t Flags) {
Expand Down Expand Up @@ -605,6 +605,9 @@ TEST(TargetParserTest, testARMArch) {
EXPECT_TRUE(
testARMArch("armv9.4-a", "generic", "v9.4a",
ARMBuildAttrs::CPUArch::v9_A));
EXPECT_TRUE(
testARMArch("armv9.5-a", "generic", "v9.5a",
ARMBuildAttrs::CPUArch::v9_A));
EXPECT_TRUE(
testARMArch("armv8-r", "cortex-r52", "v8r",
ARMBuildAttrs::CPUArch::v8_R));
Expand Down Expand Up @@ -940,6 +943,7 @@ TEST(TargetParserTest, ARMparseArchProfile) {
case ARM::ArchKind::ARMV9_2A:
case ARM::ArchKind::ARMV9_3A:
case ARM::ArchKind::ARMV9_4A:
case ARM::ArchKind::ARMV9_5A:
EXPECT_EQ(ARM::ProfileKind::A, ARM::parseArchProfile(ARMArch[i]));
break;
default:
Expand Down