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[MSP430] Fix PR32769: Select8 and Select16 need to have SR in Uses. #75
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If Select pseudo instruction doesn't have use SR, then CMP instructions are being marked as dead and later can be removed by MachineCSE pass. This leads to incorrect code generation. Differential Revision: https://reviews.llvm.org/D32473 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301372 91177308-0d34-0410-b5e6-96231b3b80d8
arielb1
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Jun 27, 2017
[MSP430] Fix PR32769: Select8 and Select16 need to have SR in Uses.
exscape
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Sep 21, 2017
This fixes the issue (rust-lang#75) with floating-point comparisons generating broken code. By default, LLVM assumes these comparisons return 32-bit values, but ours are 8-bit.
exscape
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Sep 23, 2017
This fixes the issue (rust-lang#75) with floating-point comparisons generating broken code. By default, LLVM assumes these comparisons return 32-bit values, but ours are 8-bit.
dylanmckay
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Sep 24, 2017
This fixes the avr-rust issue (rust-lang#75) with floating-point comparisons generating broken code. By default, LLVM assumes these comparisons return 32-bit values, but ours are 8-bit. Patch By Thomas Backman. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314070 91177308-0d34-0410-b5e6-96231b3b80d8
dylanmckay
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Sep 24, 2017
This fixes the issue (rust-lang#75) with floating-point comparisons generating broken code. By default, LLVM assumes these comparisons return 32-bit values, but ours are 8-bit.
alexcrichton
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Oct 10, 2017
------------------------------------------------------------------------ r314070 | dylanmckay | 2017-09-24 14:07:26 +1300 (Sun, 24 Sep 2017) | 6 lines [AVR] Implement getCmpLibcallReturnType(). This fixes the avr-rust issue (#75) with floating-point comparisons generating broken code. By default, LLVM assumes these comparisons return 32-bit values, but ours are 8-bit. Patch By Thomas Backman. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_50@314357 91177308-0d34-0410-b5e6-96231b3b80d8
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If Select pseudo instruction doesn't have use SR, then
CMP instructions are being marked as dead and later can be
removed by MachineCSE pass. This leads to incorrect code
generation.
Differential Revision: https://reviews.llvm.org/D32473
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301372 91177308-0d34-0410-b5e6-96231b3b80d8