Tracking Issue for AVX10 target features

[sayantn]

Feature gate: #![feature(avx10_target_feature)]

This is a tracking issue for Intel AVX10 target features. The Intel Whitepaper can be found here

AVX10 is a "converged vector ISA", which attempts to simplify the mess that AVX512 was (21 ISAs). AVX10.1 is just a cleanup ISA, which implies the following AVX512 ISAs.

• avx512bf16
• avx512bitalg
• avx512bw
• avx512cd
• avx512dq
• avx512f
• avx512fp16
• avx512ifma
• avx512vbmi
• avx512vbmi2
• avx512vl
• avx512vnni
• avx512vpopcntdq

Notably, the ISAs listed below, even though part of AVX512, will not be part of AVX10.1

• avx512er, avx512pf - Deprecated ISAs, were only available in the KNL and KNM series, neither Rust/LLVM nor GCC supports them anymore
• avx5124fmaps, avx5124vnniw - Deprecated ISAs, were only available in the KNM series, neither Rust/LLVM nor GCC supports them
• avx512vp2intersect - Only Intel CPU to support it was TigerLake, recently AMD has added support in Zen5
• vaes, vpclmulqdq, gfni - Intel probably wants to keep these separate from other SIMD intrinsics

AVX10.2 introduces a lot of new instructions (the new spec sheet hasn't released yet after the whitepaper, the latest one is this)

This tracking issue is meant to be incremental, i.e. new target features will be added as Intel publishes new versions of AVX10, and old versions will be stabilized.

Public API

The following target features and their associated intrinsics in stdarch

• avx10.1
• avx10.2

Implementation History:

Unresolved Questions

• None yet.

Related: #111137, #44839

@rustbot label O-x86-32 O-x86_64 A-target-feature A-SIMD